Memory access pattern: Difference between revisions

Revision as of 05:18, 14 June 2016

Revision as of 17:45, 14 June 2016

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In [[computing]], a '''memory access pattern''' is the pattern with which a system or program reads and writes [[Memory (computing)|memory]]. These patterns differ in the level of [[locality of reference]] and drastically affect [[Cache (computing)|cache]] performance,<ref>{{cite web|title = data oriented design|url=http://www.dice.se/wp-content/uploads/2014/12/Introduction_to_Data-Oriented_Design.pdf}}</ref> and also have implications for the approach to [[parallelism (computing)|parallelism]] and distribution of workload in shared memory systems.

<ref name="gpu gems2">{{cite web|title=gpgpu scatter vs gather|url=http://http.developer.nvidia.com/GPUGems2/gpugems2_chapter31.html}}</ref>

<ref>{{cite web|title=

Exploiting Memory Access Patterns to Improve Memory Performance in Data-Parallel Architectures|url=http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5473222&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5473222}}</ref>

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=== {{anchor|SCATTER}}"Scatter" memory access pattern===

A [[Scatter (vector addressing)|scatter]] memory access pattern combines sequential reads with indexed/random addressing for writes.
<ref name="gpu gems2">{{cite web|title=gpgpu scatter vs gather|url=http://http.developer.nvidia.com/GPUGems2/gpugems2_chapter31.html}}</ref>
Compared to [[#GATHER|'gather]], It may place less load on a cache hierarchy since a [[processing element]] may dispatch writes in a 'fire and forget' manner (bypassing a cache altogether), whilst using predicatble prefetching (or even DMA) for it's source data. However, it may be harder to parallelise since there is no guarantee the writes do not interact.,<ref name="gpu gems"/> and many systems are still designed assuming that a hardware cache will coalesce many small writes into larger ones.

In the past, [[forward texture mapping]] attempted to handle the randomness with 'writes', whilst sequentially reading source texture information.

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=== {{anchor|GATHER}} "Gather" memory access pattern ===

In a [[gather (vector addressing)|gather]] memory access pattern, reads are randomly addressed or indexed, whilst the writes are sequential (or [[#LINEAR|linear]]).
<ref name="gpu gems2"/>
An example is found in [[inverse texture mapping]], where data can be written out linearly across scanlines, whilst random access texture addresses are calculated per pixel. Compared to [[#SCATTER|scatter]], the disadvantage is that caching (and bypassing latencies) is now essential for reads, however it is easier to parallelise since the writes are guaranteed to not overlap. As such the gather approach is more common for [[gpgpu]] programming,<ref name="gpu gems"/> where the massive threading (enabled by parallelism) is used to hide read latencies.

<ref name = "gpu gems">{{cite web|title = GPU gems|url=https://books.google.co.uk/books?id=lGMzmbUhpiAC&pg=PA51&lpg=PA51&dq=scatter+memory+access+pattern&source=bl&ots=nwKeqfQHeV&sig=lsFTC52P_Fu7EU1-JIlwqDdZozg&hl=en&sa=X&ved=0ahUKEwjtxZOHxqXNAhWEOxoKHWPsAJgQ6AEISTAG#v=onepage&q=scatter%20memory%20access%20pattern&f=false}}deals with 'scatter memory access patterns' and 'gather memory access patterns' in the text</ref>