Automatic test pattern generation: Difference between revisions

Revision as of 01:09, 4 December 2003

Revision as of 19:14, 4 November 2004

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after they are produced.

Testing [[very-large-scale integration|very-large-scale integrated]] circuits with a high [[fault coverage]] is a harddifficult task because of their complexity.

Different ATPG methods have to be applied to [[Combinatorial logic|combinatorial]] and [[Sequential logic|sequential]] circuits.