Talk:Microcode: Difference between revisions

Revision as of 06:13, 19 April 2017

Revision as of 06:19, 19 April 2017

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I know of no IBM processor with horizontal microcode in which the micro-orders are not decoded. Typically [[Read-only memory|Read Only Storage]] (ROS) was expensive, and it was cost effective to have a minimal amount of encoding of, e.g., register selections, ALU function. Of course, vertical microcode has more extensive encoding. Note that the definition in practice does not match [[ Maurice Wilkes#Other computing developments|that]] coined by [[ Maurice Wilkes|Wilkes]]. [[User:Chatul|Shmuel (Seymour J.) Metz Username:Chatul]] ([[User talk:Chatul|talk]]) 16:50, 28 May 2015 (UTC)

== RISC vs. VLIWCISC inconsistency ==

It looks like there's a conflict between one of the advantages and disadvantages of RISC:

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* '''Disadvantage:''' Non-RISC instructions inherently perform more work per instruction (on average), and are also normally highly encoded, so they enable smaller overall size of the same program, and thus better use of limited cache memories.

If complex instructions are rarely used in real-world code, then there shouldn't be much of a difference in the size of VLIWCISC code vs. RISC code.

One of these points needs to be altered, I think...