Pass transistor logic: Difference between revisions

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In [[electronics]], '''pass transistor logic''' (PTL) describes several [[logic family|logic families]] used in the design of [[integrated circuit]]s. It reduces the count of transistors used to make different [[logic gate]]s, by eliminating redundant transistors. Transistors are used as switches to pass [[logic level]]s between nodes of a circuit, instead of as switches connected directly to supply voltages.<ref>Jaume Segura, Charles F. Hawkins ''CMOS electronics: how it works, how it fails'', Wiley-IEEE, 2004 {{ISBN |0-471-47669-2}}, page 132</ref> This reduces the number of active devices, but has the disadvantage that the difference of the voltage between high and low logic levels decreases at each stage. Each transistor in series is less saturated at its output than at its input.<ref>Clive Maxfield ''Bebop to the boolean boogie: an unconventional guide to electronics''Newnes, 2008 {{ISBN |1-85617-507-3}}, pp. 423-426</ref> If several devices are chained in series in a logic path, a conventionally constructed gate may be required to restore the signal voltage to the full value. By contrast, conventional [[CMOS logic]] switches transistors so the output connects to one of the power supply rails, so logic voltage levels in a sequential chain do not decrease.
<!-- needs a diagram -->Simulation of circuits may be required to ensure adequate performance.
 
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==Other forms==
Static and dynamic types of pass transistor logic exist, with differing properties with respect to speed, power and low-voltage operation.<ref>Cornelius T. Leondes ''Digital signal processing systems: implementation techniques'' Elsevier, 1995 {{ISBN |0-12-012768-7}} page 2</ref> As integrated circuit supply voltages decrease, the disadvantages of pass transistor logic become more significant; the threshold voltage of transistors becomes large compared to the supply voltage, severely limiting the number of sequential stages. Because complementary inputs are often required to control pass transistors, additional logic stages are required.
 
==References==
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==Further reading==
*Weste and Harris, CMOS VLSI Design, Third Edition ({{ISBN |0-321-14901-7}}; {{ISBN |0-321-26977-2}} (international edition))
*Douglas A. Pucknell and Kamran Eshraghian, Basic VLSI Design, Third Edition ({{ISBN |978-81-203-0986-9}} (Indian Edition))
 
[[Category:Logic families]]