Automatic test pattern generation: Difference between revisions

Revision as of 21:38, 27 May 2017

Revision as of 08:32, 8 September 2017

Line 1:

'''ATPG''' (acronym for both '''A'''utomatic '''T'''est '''P'''attern '''G'''eneration and '''A'''utomatic '''T'''est '''P'''attern '''G'''enerator) is an [[electronic design automation]] method/technology used to find an input (or test) sequence that, when applied to a [[digital circuit]], enables [[automatic test equipment]] to distinguish between the correct circuit behavior and the faulty circuit behavior caused by defects. The generated patterns are used to test semiconductor devices after manufacture, or to assist with determining the cause of failure ([[failure analysis]].<ref>{{cite conference| last=Crowell| first=G| author2=Press, R.| title=Using Scan Based Techniques for Fault Isolation in Logic Devices| booktitle=Microelectronics Failure Analysis | pages= 132–8}}</ref>). The effectiveness of ATPG is measured by the number of modeled defects, or [[fault models]], detectable and by the number of generated patterns. These metrics generally indicate [[test quality]] (higher with more fault detections) and test application time (higher with more patterns). ATPG efficiency is another important consideration that is influenced by the fault model under consideration, the type of circuit under test ([[Scan chain|full scan]], synchronous sequential, or asynchronous sequential), the level of abstraction used to represent the circuit under test (gate, register-transfer, switch), and the required [[Fault coverage|test quality]].

== Basics of ATPG ==