Talk:Microcode: Difference between revisions

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So what do "intel's recent advances in microarchitecture" have to do with microcode?
Is it really true that some processors use microcode for some but not all instructions?
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:Do those advances in microarchitecture have anything to do with microcode? (The fact that both words include the prefix "micro" does not indicate that microcode is involved in all aspects of microarchitecture.) If not, perhaps this question should be asked on the [[Talk:Intel Core Microarchitecture|Intel Core Microarchitecture talk page]], not the talk page for the microcode page. [[User:Guy Harris|Guy Harris]] 06:35, 28 August 2006 (UTC)
 
== some CPUs don't use microcode ==
 
The first few paragraphs seem to imply that *all* CPUs use microcode.
 
Towards the end, the "Microcode versus VLIW and RISC" section says that VLIW and RISC CPUs do not use microcode.
 
Confusing.
 
Then it claims that more recent "Modern implementations of CISC instruction sets" use microcode for only *some* instructions.
(Is this a round-about method of talking about Intel Pentium processors, or is there some other "modern ... CISC"?)
 
I suspect this is incorrect.
 
My understanding is that, the instruction decoder on modern Pentium processors breaks down x86 instructions into one or more internal [[micro-op]]s, so it does have some similarities to the microcode store.
But the information inside that decoder is technically not microcode, because the decoder is technically not a control store, because its output lines to not directly control the various parts of the Pentium CPU.
Instead, the decoder output lines feed into the micro-op buffer,
and as many micro-ops as possible (which varies cycle-by-cycle) are munched on each cycle (as selected by the [[superscalar]] dispatch unit).
 
Is it really true that some processors use microcode for some but not all instructions?
--[[User:70.189.77.59|70.189.77.59]] 05:47, 15 October 2006 (UTC)