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Hardware-based encryption is the use of [[Computer Hardware]] to assist software, or sometimes replace software, in the process of data [[encryption]]. Typically, this is implemented as part of the [[CPU|processor]]'s instruction set. For example, the [[Advanced Encryption Standard|AES]] encryption algorithm (a modern [[cipher]]) can be implemented using the [[AES instruction set]] on the ubiquitous [[x86]] architecture.<ref name="Intel AES Instructions">{{cite book|title=Intel® 64 and IA-32 Architectures Software Developer’s Manual|date={{date|December 2017}}|url=https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf|publisher=Intel|pages=303-309,410}}</ref> Such instructions also exist on the [[ARM architecture]].<ref name="cortex cryptography">{{cite book|title=ARM® Cortex®-A57 MPCore Processor Cryptography Extension|date={{date|2017-12-17}}|publisher=ARM Holdings|url=http://infocenter.arm.com/help/topic/com.arm.doc.ddi0514g/DDI0514G_cortex_a57_mpcore_cryptography_trm.pdf}}</ref> However, more unusual systems exist where the cryptography module is separate from the central processor, instead being implemented as a [[coprocessor]], in particular a [[secure cryptoprocessor]], of which an example is the [[IBM 4764]]<ref name="IBM 4764">{{cite web|url=https://www.ibm.com/support/knowledgecenter/ssw_ibm_i_61/rzajc/rzajcco4758.htm|title=4764 Cryptographic Coprocessor|publisher=IBM|access-date={{date|2018-01-20}}}}</ref>. Hardware implementations can be faster and less prone to exploitation than traditional software implementations, and furthermore can be protected against tampering.<ref name="performance">{{cite web|title=AES-NI Performance Analyzed|url=http://www.tomshardware.com/reviews/clarkdale-aes-ni-encryption,2538.html|publisher=Tom's Hardware|year=2010|author=P. Schmid and A. Roos |accessdate={{date|2018-01-20}}}}</ref> However, hardware implementations use additional space on the processor die, and any security vulnerability (such as [[Spectre (security vulnerability)|Spectre]]) cannot be solved with a software update.<ref name="MeltdownSpectre">{{Cite web |author=Staff |url=https://spectreattack.com/ |title=Meltdown and Spectre |date=2018 |work=[[Graz University of Technology]] |access-date={{date|2018-01-20}} |dead-url=no |archive-url=https://web.archive.org/web/20180103221345/https://spectreattack.com/ |archive-date={{date|2018-01-03}}}}</ref>
== History ==
Hardware-based encryption arguably began in the 1987 with the ABYSS (A Basic Yorktown Security System) project.<ref>{{cite web|url=https://www.computer.org/csdl/proceedings/sp/1987/0771/00/07710038.pdf|title=ABYSS: A Trusted Architecture for Software Protection|access-date={{date|2018-01-20}}}}</ref><ref name="building 4758">{{cite web|url=http://www.research.ibm.com/people/s/sailer/publications/2001/ibm4758.pdf|title=Building the IBM 4758 Secure Coprocessor |access-date={{date|2018-01-20}}|publisher=[[IBM]]}}</ref>
== Implementations ==
=== In the [[Instruction Set]] ===
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{{Cryptography navbox | machines}}
[[Category:Computer hardware
[[Category:Cryptography]]
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