Pass transistor logic: Difference between revisions

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==References==

{{Reflist|refs=

<ref name="IEEE_1990">{{cite journal |title=A 3.8-ns CMOS 16x16-b multiplier using complementary pass-transistor logic |author-last1=Yano |author-first1=K.Kuniaki |author-last2=Yamanaka |author-first2=T.Toshiaki Yamanaka |author-last3=Nishida |author-first3=T.Takeshi |author-last4=Saito |author-first4=M.Mitsuo |author-last5=Shimohigashi |author-first5=K.Katsuhiro |author-last6=Shimizu |author-first6=A.Atsushi |date=1990 |journal=[[IEEE Journal of Solid State Circuits]] |volume=25 |issue=2 |pages=388-395 |doi=10.1109/4.52161}}</ref>

<ref name="ULVD_2015">{{cite book |title=Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits |author-first1=Nele |author-last1=Reynders |author-first2=Wim |author-last2=Dehaene |series=Analog Circuits And Signal Processing (ACSP) |date=2015 |edition=1 |___location=Heverlee, Belgium |publisher=[[Springer International Publishing AG Switzerland]] |publication-place=Cham, Switzerland |isbn=978-3-319-16135-8 |issn=1872-082X |doi=10.1007/978-3-319-16136-5 |lccn=2015935431}}</ref>

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