Pass transistor logic: Difference between revisions

Revision as of 12:29, 14 April 2018

Revision as of 18:32, 9 June 2018

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==Basic principles of pass transistor circuits==

The pass transistor is driven by a periodic clock signal and acts as an access switch to either charge up or charge down the parasitic capacitance C_''x'', depending on the input signal V_''in''. Thus, the two possible operations when the clock signal is active (CK = 1) are the logic "1" transfer (charging up the capacitance C_''x'' to a logic-high level) and the logic "0" transfer (charging down the capacitance C_''x'' to a logic-low level). In either case, the output of the depletion load nMOS inverter obviously assumes a logic-low or a logic-high level, depending upon the voltage V_''x''.

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