Reconfigurable computing: Difference between revisions

Revision as of 21:46, 19 June 2018

Revision as of 04:11, 28 August 2018

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==History==

The concept of reconfigurable computing has existed since the 1960s, when [[Gerald Estrin]]'s paper proposed the concept of a computer made of a standard processor and an array of "reconfigurable" hardware.<ref name="Estrin2002">{{cite journal | last1 = Estrin | first1 = G | year = 2002 | title = Reconfigurable computer origins: the UCLA fixed-plus-variable (F+V) structure computer | url = | journal = IEEE Ann. Hist. Comput. | volume = 24 | issue = 4| pages = 3–9 | doi = 10.1109/MAHC.2002.1114865 }}</ref><ref>

Estrin, G., "Organization of Computer Systems—The Fixed Plus Variable Structure Computer",

''Proc. Western Joint Computer Conf.'', Western Joint Computer Conference, New York, 1960, pp. 33–40.</ref> The main processor would control the behavior of the reconfigurable hardware. The latter would then be tailored to perform a specific task, such as image processing or pattern matching, as quickly as a dedicated piece of hardware. Once the task was done, the hardware could be adjusted to do some other task. This resulted in a hybrid computer structure combining the flexibility of software with the speed of hardware.

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''Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines''

(FCCM '97, April 16–18, 1997), pp. 24–33.

</ref> Elixent, NGEN,<ref>{{Cite journal|last=McCaskill|first=John S.|last2=Chorongiewski|first2=Harald|last3=Mekelburg|first3=Karsten|last4=Tangen|first4=Uwe|last5=Gemm|first5=Udo|date=1994-09-01|title=NGEN — Configurable computer hardware to simulate long-time self-organization of biopolymers|url=http://onlinelibrary.wiley.com/doi/10.1002/bbpc.19940980906/abstract|journal=Berichte der Bunsengesellschaft für physikalische Chemie|language=en|volume=98|issue=9|pages=1114–1114|doi=10.1002/bbpc.19940980906|issn=0005-9021}}</ref>, Polyp,<ref>{{Cite book|url=https://www.worldcat.org/oclc/39655211|title=Evolvable systems : from biology to hardware : second International Conference, ICES 98, Lausanne, Switzerland, September 23-25, 1998 : proceedings|date=1998|publisher=Springer|others=Sipper, Moshe., Mange, Daniel, 1940-, Pérez-Uribe, Andrés., International Conference on Evolvable Systems (2nd : 1998 : Lausanne, Switzerland)|isbn=3540649549|___location=Berlin|oclc=39655211}}</ref>, MereGen,<ref name=":1">{{Cite book|url=https://www.worldcat.org/oclc/49750250|title=Coupling of biological and electronic systems : proceedings of the 2nd Caesarium, Bonn, November 1-3, 2000|date=2002|publisher=Springer|others=Hoffmann, K.-H. (Karl-Heinz)|isbn=3540436995|___location=Berlin|oclc=49750250}}</ref>, PACT XPP, Silicon Hive, Montium, Pleiades, Morphosys, and PiCoGA.<ref>Campi, F.; Toma, M.; Lodi, A.; Cappelli, A.; Canegallo, R.; Guerrieri, R., "A VLIW processor with reconfigurable instruction set for embedded applications", Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International, vol., no., pp. 250–491 vol. 1, 2003</ref> Such designs were feasible due to the constant progress of silicon technology that let complex designs be implemented on one chip. Some of these massively parallel reconfigurable computers were built primarily for special subdomains such as molecular evolution, neural or image processing. The world's first commercial reconfigurable computer, the Algotronix CHS2X4, was completed in 1991. It was not a commercial success, but was promising enough that [[Xilinx]] (the inventor of the [[FPGA|Field-Programmable Gate Array]], FPGA) bought the technology and hired the Algotronix staff.<ref>[http://www.algotronix.com/people/tom/album.html Algotronix History]</ref> Later machines enabled first demonstrations of scientific principles, such as the spontaneous spatial self-organisation of genetic coding with MereGen.<ref>{{Cite journal|last=Füchslin|first=Rudolf M.|last2=McCaskill|first2=John S.|date=2001-07-31|title=Evolutionary self-organization of cell-free genetic coding|url=http://www.pnas.org/content/98/16/9185|journal=Proceedings of the National Academy of Sciences|language=en|volume=98|issue=16|pages=9185–9190|doi=10.1073/pnas.151253198|issn=0027-8424|pmc=55395|pmid=11470896}}</ref>

==Theories==

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===Hartenstein's Xputer===

{{main article|Xputer}}

Computer scientist Reiner Hartenstein describes reconfigurable computing in terms of an ''[[anti-machine]]'' that, according to him, represents a fundamental paradigm shift away from the more conventional [[Von Neumann architecture|von Neumann machine]].<ref>Hartenstein, R. 2001. A decade of reconfigurable computing: a visionary retrospective. In ''Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2001)'' (Munich, Germany). W. Nebel and A. Jerraya, Eds. Design, Automation, and Test in Europe. IEEE Press, Piscataway, NJ, 642–649.</ref> Hartenstein calls it Reconfigurable Computing Paradox, that software-to-configware (software-to-[[FPGA]]) migration results in reported speed-up factors of up to more than four orders of magnitude, as well as a reduction in electricity consumption by up to almost four orders of magnitude—although the technological parameters of FPGAs are behind the [[Moore's law|Gordon Moore curve]] by about four orders of magnitude, and the clock frequency is substantially lower than that of microprocessors. This paradox is partly explained by the [[Von Neumann bottleneck|Von Neumann syndrome]].

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One of the major tasks of an operating system is to hide the hardware and present programs (and their programmers) with nice, clean, elegant, and consistent abstractions to work with instead. In other words, the two main tasks of an operating system are abstraction and resource management.<ref name=":0" />

Abstraction is a powerful mechanism to handle complex and different (hardware) tasks in a well-defined and common manner. One of the most elementary OS abstractions is a process. A process is a running application that has the perception (provided by the OS) that it is running on its own on the underlying virtual hardware. This can be relaxed by the concept of threads, allowing different tasks to run concurrently on this virtual hardware to exploit task level parallelism. To allow different processes and threads to coordinate their work, communication and synchronization methods have to be provided by the OS.<ref name=":0" />

In addition to abstraction, resource management of the underlying hardware components is necessary because the virtual computers provided to the processes and threads by the operating system need to share available physical resources (processors, memory, and devices) spatially and temporarily.<ref name=":0" />