High-level language computer architecture: Difference between revisions

Revision as of 18:17, 12 April 2018

Revision as of 23:24, 20 September 2018

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Since the 1980s the focus of research and implementation in general-purpose computer architectures has primarily been in RISC-like architectures, typically internally register-rich [[load/store architecture]]s, with rather stable, non-language-specific ISAs, featuring multiple registers, pipelining, and more recently multicore systems, rather than language-specific ISAs. Language support has focused on compilers and their runtimes, and interpreters and their virtual machines (particularly JIT'ing ones), with little direct hardware support. For example, the current [[Objective-C]] runtime for iOS implements [[tagged pointer]]s, which it uses for type-checking and garbage collection, despite the hardware not being a tagged architecture.

In computer architecture, the RISC approach has proven very popular and successful instead, and is opposite from HLLCAs, emphasizing a very simple instruction set architecture. However, the speed advantages of RISC computers in the 1980s was primarily due to early adoption of [[on-chip cache]] and room for large registers, rather than intrinsic advantages of RISC.

==See also==