Routing (electronic design automation): Difference between revisions

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The main types of autorouters are:
 
* [[Maze router]]<ref name="Byers_1991"/><ref name="Ritchey_1999"/>
** {{anchor|Lee}}[[Lee router]]<ref name="Lee_1961"/><ref name="Byers_1991"/><ref name="Whitaker_2005"/>
** {{anchor|Hadlock}}[[Hadlock router]]<ref name="Hadlock_1977"/>
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** [[Switchbox router]]
** {{anchor|Spine}}[[Spine and stitch router]]<ref>https://www.semiwiki.com/forum/content/1208-channel-routing-memories.html</ref>
* Gridless router<ref name="Whitaker_2005Finch_1985"/><ref name="Minges_1989"/><ref name="Whitaker_2005"/><ref name="Webb_2012"/>
** [[Area router]]
** Graph-theoretical router<!-- term translated from German term -->
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<ref name="Byers_1991">{{cite book |title=Printed Circuit Board Design with Microcomputers |author-first=T. J. |author-last=Byers |edition=1 |publisher=[[Intertext Publications/Multiscience Press, Inc.]], [[McGraw-Hill Book Company]] |___location=New York, USA |date=1991-08-01 |isbn=0-07-009558-2 |lccn=91-72187 |pages=99-101 |url=https://dl.acm.org/citation.cfm?id=114661}}</ref>
<ref name="Whitaker_2005">{{cite book |title=The Electronics Handbook |editor-first1=Jerry C. |editor-last1=Whitaker |editor-first2=Richard C. |editor-last2=Dorf |author-first1=Ravindranath |author-last1=Kollipara |author-first2=Vijai K. |author-last2=Tripathi |author-first3=Jerry E. |author-last3=Sergent |author-first4=Glenn R. |author-last4=Blackwell |author-first5=Donald |author-last5=White |author-first6=Zbigniew J. |author-last6=Staszak |chapter=11.1.3 Packaging Electronic Systems - Design of Printed Wiring Boards |publisher=[[CRC Press]], [[Taylor & Francis Group, LLC]] |date=2005 |edition=2 |isbn=978-0-8493-1889-4 |id={{ISBN|0-8493-1889-0}} |lccn=2004057106 |page=1266 |url=http://s1.downloadmienphi.net/file/downloadfile6/192/1385077.pdf |access-date=2017-09-25 |dead-url=no |archive-url=https://web.archive.org/web/20170925235855/http://s1.downloadmienphi.net/file/downloadfile6/192/1385077.pdf |archive-date=2017-09-25}}</ref>
<ref name="Lee_1961">{{cite journal |doi=10.1109/TEC.1961.5219222 |author-first=Chester Y. |author-last=Lee |title=An algorithm for path connections and its applications |journal=[[IRE Transactions on Electronic Computers]] |volume=EC-10 |issue=3 |date=September 1961 |pages=346–365}}</ref>
<ref name="Hightower_1969">{{cite conference |author-first=David W. |author-last=Hightower |title={{doi-inline|10.1145/800260.809014|A solution to line-routing problems on the continuous plane}} |book-title=DAC'69: Proceedings of the 6th Annual Conference on Design Automation |publisher=[[ACM Press]] |date=1969 |pages=1–24}} (NB. This contains one of the first descriptions of a "line probe router".)</ref>
<ref name="Reed_1985">{{cite journal |author-first1=James B. |author-last1=Reed |author-first2=Alberto |author-last2=Sangiovanni-Vincentelli |author-first3=Mauro |author-last3=Santamauro |title=A new symbolic channel router: YACR2 |journal=[[IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems]] |pages=203–219 |date=1985 |url=http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1270117}} [https://www.researchgate.net/publication/3225251_A_New_Symbolic_Channel_Router_YACR2]</ref>
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<ref name="CW_1992_Bloodhound">{{cite web |title=Computer-Partner Kiel GmbH: "Bloodhound" entflechtet Leiterplatten auf 16 Lagen |language=German |journal=[[Computerwoche]] |date=1992-03-13 |url=https://www.computerwoche.de/a/bloodhound-entflechtet-leiterplatten-auf-16-lagen,1133225 |access-date=2018-10-20 |dead-url=no |archive-url=http://archive.is/0E57S |archive-date=2018-10-20}}</ref>
<ref name="Redlich_2018_Routers">{{cite book |title=Schaltungsdesign |author-first=Detlef |author-last=Redlich |chapter=1.6. Rechnergestützter Leiterplattenentwurf - Entflechtung |language=German |publisher=[[Ernst-Abbe-Hochschule Jena]] (EAH) |url=http://web.eah-jena.de/fhj/etit/fb/homepage/home-redlich/lehre/design/Documents/Rechnergest_LP_Entwurf_Einf%C3%BChrung.pdf |access-date=2018-10-20 |dead-url= |archive-url=http://archive.is/NeYMu |archive-date=2018-10-20}}</ref>
<ref name="Webb_2012">{{cite web |title=A Tribute to Alan Finch, the Father of Gridless Autorouting |author-first=Darrell |author-last=Webb |date=2012-12-20 |url=https://blog.zuken.com/a-tribute-to-alan-finch-the-father-of-gridless-autorouting/ |access-date=2018-10-22 |dead-url=no |archive-url=http://archive.is/MIQMT |archive-date=2018-10-22}}</ref>
<ref name="Finch_1985">{{cite conference |author-first1=Alan C. |author-last1=Finch |author-first2=Ken J. |author-last2=Mackenzie |author-first3=G. J. |author-last3=Balsdon |author-first4=G. |author-last4=Symonds |title=A Method for Gridless Routing of Printed Circuit Boards |conference=22nd ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA |date=1985-06-23<!-- /26 --> |publisher=[[Racal-Redac Ltd.]] |___location=Newtown, Tewkesbury, Gloucestershire, UK |issn=0738-100X |isbn=0-8186-0635-5 |pages=509-515 |doi=10.1109/DAC.1985.1585990 |url=https://www.cs.york.ac.uk/rts/docs/DAC-1964-2006/PAPERS/1985/DAC85_509.PDF |access-date=2018-10-22 |dead-url=no |archive-url=https://web.archive.org/web/20181022030533/https://www.cs.york.ac.uk/rts/docs/DAC-1964-2006/PAPERS/1985/DAC85_509.PDF |archive-date=2018-10-22}}</ref>
<ref name="Ritchey_1999">{{cite journal |title=PCB routers and routing methods |author-first=Lee W. |author-last=Ritchey |publisher=Speeding Edge |date=December 1999 |issue=February 1999 |journal=PC Design Magazine |url=http://www.speedingedge.com/PDF-Files/pcbrouters.pdf |access-date=2018-10-22 |dead-url=no |archive-url=https://web.archive.org/web/20181022033826/http://www.speedingedge.com/PDF-Files/pcbrouters.pdf |archive-date=2018-10-22}}</ref>
}}