Application-specific instruction set processor: Difference between revisions

Revision as of 02:53, 25 September 2018

Revision as of 23:03, 9 March 2019

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{{Use American English|date = March 2019}}

{{Short description|Processor with an instruction set customized (optimized) for a specific task}}

{{Use mdy dates|date = March 2019}}

{{Inline citations|date=January 2015}}

An '''application-specific instruction set processor''' ('''ASIP''') is a component used in [[system-on-a-chip]] design. The [[instruction set]] of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose [[Central processing unit|CPU]] and the performance of an [[Application-specific integrated circuit|ASIC]].

Some ASIPs have a configurable instruction set. Usually, these cores are divided into two parts: ''static'' logic which defines a minimum ISA (instruction-set architecture) and ''configurable'' logic which can be used to design new instructions. The configurable logic can be programmed either in the field in a similar fashion to an [[FPGAField-programmable gate array]] (FPGA) or during the chip synthesis.

ASIPs can be used as an alternative of hardware accelerators for baseband signal processing<ref>Shahabuddin, Shahriar et al., "Design of a transport triggered vector processor for turbo decoding", Springer Journal of Analog Integrated Circuits and Signal Processing, March 2014. </ref> or video coding.<ref> Hautala, Ilkka, et al. "Programmable Low-Power Multicore Coprocessor Architecture for HEVC/H.265 In-Loop Filtering" in IEEE Transactions on Circuits and Systems for Video Technology, November 2014 </ref> Traditional hardware accelerators for these applications suffer from inflexibility. It is very difficult to reuse the hardware datapath with handwritten [[finite-state machine]]s (FSM). The retargetable compilers of ASIPs help the designer to update the program and reuse the datapath. Typically, the ASIP design is more or less dependent on the tool flow because designing a processor from scratch can be very complicated. There are some commercial tools to design ASIPs, for example Processor Designer from Synopsys. There is an open source tool as well, TTA-based codesignco-design environment (TCE).

==See also==