Content deleted Content added
Vishaldbhat (talk | contribs) m This change explains the actual need of decoding |
→top: Remove sentence that, to me, is incomprehensible: "In the view of processors, the decoding is a main process of generation of the required opcode which insists the CPU to perform the computing task." (Machine translation?) |
||
Line 13:
A single address decoder with n address input bits can serve up to 2<sup>n</sup> devices. Several members of the [[List of 7400 series integrated circuits|7400 series]] of [[integrated circuit]]s can be used as address decoders. For example, when used as an address decoder, the 74154<ref>[http://web.mit.edu/6.115/www/datasheets/74hc154.pdf Datasheet for 74HC154]</ref> provides four address inputs and sixteen (i.e., 2<sup>4</sup>) device selector outputs. An address decoder is a particular use of a [[binary decoder]] circuit known as a "[[demultiplexer]]" or "demux" (the 74154 is commonly called a "4-to-16 demultiplexer"), which has many other uses besides address decoding.
Address decoders are fundamental building blocks for systems that use [[Bus (computing)|buses]]. They are represented in all integrated circuit families and processes and in all standard [[FPGA]] and [[Application-specific integrated circuit|ASIC]] libraries. They are discussed in introductory textbooks in digital logic design
==References==
| |||