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* in DRAM memory circuits, capacitor trenches may be 10–20 µm deep,
* in MEMS, DRIE is used for anything from a few micrometers to 0.5 mm.
* in irregular chip dicing, DRIE is used with a novel hybrid soft/hard mask to achieve sub-millimeter etching to dice silicon dies into lego-like pieces with irregular shapes.<ref>{{cite journal | last1= Ghoneim | first1= Mohamed | last2 = Hussain | first2= Muhammad | title = Highly Manufacturable Deep (Sub-Millimeter) Etching Enabled High Aspect Ratio Complex Geometry Lego-Like Silicon Electronics| journal= Small | date= 1 February 2017 | doi=10.1002/smll.201601801 | pmid= 28145623 | volume=13 | issue= 16 | page=1601801| hdl= 10754/622865 }}</ref><ref>{{cite news | last= Mendis | first= Lakshini | title= Lego-like Electronics | newspaper= Nature Middle East | date= 14 February 2017 | doi= 10.1038/nmiddleeast.2017.34 }}</ref><ref>{{cite news | last= Berger | first= Michael | title=Lego like silicon electronics fabricated with hybrid etching masks | newspaper= Nanowerk | date= 6 February 2017 | url= http://www.nanowerk.com/spotlight/spotid=45763.php}}</ref>
* in flexible electronics, DRIE is used to make traditional monolithic CMOS devices flexible by reducing the thickness of silicon substrates to few to tens of micrometers.<ref>{{ cite journal | last1= Ghoneim | first1= Mohamed | first2=Nasir | last2=Alfaraj | first3=Galo | last3=Torres-Sevilla | first4=Hossain | last4=Fahad | first5=Muhammad | last5=Hussain | title=Out-of-Plane Strain Effects on Physically Flexible FinFET CMOS | journal=IEEE Transactions on Electron Devices | volume= 63 | issue= 7 | pages= 2657–2664 | date= July 2016
What distinguishes DRIE from RIE is etch depth: Practical etch depths for RIE (as used in [[integrated circuit|IC]] manufacturing) would be limited to around 10 µm at a rate up to 1 µm/min, while DRIE can etch features much greater, up to 600 µm or more with rates up to 20 µm/min or more in some applications.
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