Bus encoding: Difference between revisions

Revision as of 04:58, 11 July 2019

Revision as of 04:07, 29 August 2019

Line 56:

==References==

{{Reflist|refs=

<ref name="RTL">{{citecitation |url=http://sportlab.usc.edu/~massoud/Papers/low-power-RTL-review-journal.pdf |author-first1=Massoud |author-last1=Pedram |author-first2=A. |author-last2=Abdollahi |title=Low Power RT-Level Synthesis Techniques: A Tutorial}}</ref>

<ref name="devdasmalik">{{citecitation |author-last1=Devadas |author-last2=Malik |title=A Survey of Optimization Techniques targeting Low Power VLSI Circuits |journal=DAC 32 |date=1995 |pages=242–247}}</ref>

<ref name="massoud">{{citecitation |url=http://sportlab.usc.edu/~massoud/Papers/isqed-tut.pdf |author-first1=Wei-Chung |author-last1=Cheng |author-first2=Massoud |author-last2=Pedram |title=Memory Bus Encoding for Low Power: A Tutorial}}</ref>

<ref name="Shifted_Gray">{{cite journal |author-first1=Hui |author-last1=Guo |author-first2=Sri |author-last2=Parameswaran |doi=10.1016/j.sysarc.2010.03.003 |volume=56 |issue=4–6 |date=April–June 2010 |title=Shifted Gray encoding to reduce instruction memory address bus switching for low-power embedded systems |journal=Journal of Systems Architecture |pages=180–190}}</ref>

<ref name="Zero-Transition_1997">{{cite journal |author-first1=Luca |author-last1=Benini |author-first2=Giovanni |author-last2=De Micheli |author-first3=Enrico |author-last3=Macii |author-first4=D. |author-last4=Sciuto |author-first5=C. |author-last5=Silvano |title=Asymptotic Zero-Transition Activity Encoding for Address Buses in Low-Power Microprocessor-Based Systems |journal=Proceedings Seventh Great Lakes Symposium on VLSI |pages=77–82 |date=March 1997}}</ref>