Partial-response maximum-likelihood: Difference between revisions

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In 1990, IBM shipped the first PRML channel in an HDD in the [https://en.wikipedia.org/w/index.php?title=History_of_IBM_magnetic_disk_drives&section=44 IBM 0681] (called Redwing during its development). The IBM 0681 was the last HDD product developed at the [[IBM Hursley]], lab. in the UK. It was full-height 5¼-inch form-factor with up to 12 of 130 mm disks and had a maximum capacity of 857 MB.

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The PRML channel for the IBM 0681 was developed in [[IBM Rochester]] lab. in Minnesota<ref>[https://ieeexplore.ieee.org/document/278677 J. Coker, R. Galbraith, G. Kerwin, J. Rae, P. Ziperovich, "Implementation of PRML in a rigid disk drive", IEEE Trans. Magn., Vol. 27, No. 6, pp. 4538-43, Nov. 1991]</ref> with support from the [[IBM Zurich]] Research lab. in [[Switzerland]].<ref>[https://ieeexplore.ieee.org/document/124468 R.Cidecyan, F.Dolvio, R. Hermann, W.Hirt, W. Schott "A PRML System for Digital Magnetic Recording", IEEE Journal on Selected Areas in Comms, vol.10, No.1, pp.38-56, Jan 1992]</ref>. A parallel R&D effort at IBM San Jose did not lead directly to a product.<ref>[https://ieeexplore.ieee.org/document/104703 T. Howell, et al. "Error Rate Performance of Experimental Gigabit per Square Inch Recording Components", IEEE Trans. Magn., Vol. 26, No. 5, pp. 2298-2302, 1990]</ref>. <br>

The IBM 0681 read/write channel ran at a data-rate of 24 Mbits/s but was more highly integrated with the entire channel contained in a single 68-pin [[Chip_carrier#Plastic-leaded_chip_carrier leaded chip carrier|PLCC]] [[integrated circuit]] operating off a 5 volt supply. As well as the fixed analog equalizer, the channel boasted a simple adaptive digital 'cosine equalizer' after the A/D to compensate for changes in radius and/or changes in the magnetic components.

=== Write Precompensation ===

The presence of nonlinear transition-shift (NLTS) distortion on [[NRZ]] recording at high density and/or high data-rate was recognized in 1979.<ref>[https://ieeexplore.ieee.org/document/1060300 R. Wood, R. Donaldson, "The Helical-Scan Magnetic Tape Recorder as a Digital Communication Channel", IEEE Trans. Mag. vol. MAG-15, no. 2, pp. 935-943, March 1979]</ref>. The magnitude and sources of NLTS can be identified using the 'extracted dipulse' technique.<ref>[https://ieeexplore.ieee.org/document/1065310 D. Palmer, P. Ziperovich, R. Wood, T. Howell, "Identification of Nonlinear Write Effects Using Pseudo-Random Sequences", IEEE Trans. Magn., Vol. MAG-23, no. 5, pp. 2377-2379, Sept. 1987]</ref><ref>[https://ieeexplore.ieee.org/document/5680698/ D. Palmer, J. Hong, D. Stanek, R. Wood, "Characterization of the Read/Write Process for Magnetic Recording", IEEE Trans. Magn., Vol. MAG-31, No. 2, pp. 1071-1076, Mar. 1995 (invited)]</ref>. <br>

Ampex was the first to recognize the impact of NLTS on PR4.<ref>[https://ieeexplore.ieee.org/document/1064566 P. Newby, R. Wood, "The Effects of Nonlinear Distortion on Class IV Partial Response", IEEE Trans. Magn., Vol. MAG-22, No. 5, pp. 1203-1205, Sept. 1986]</ref>. and was first to implement [[Write precompensation]] for PRML NRZ recording. 'Precomp.' largely cancels the effect of NLTS. <ref>[https://ieeexplore.ieee.org/document/1063460 R. Wood, S. Ahlgrim, K. Hallamasek, R. Stenerson, "An Experimental Eight-inch Disc Drive with One-hundred Megabytes Per Surface", IEEE Trans. Mag., vol. MAG-20, No. 5, pp. 698-702, Sept. 1984. (invited)]</ref>. 'Precomp.'is viewed as a necessity for a PRML system and is important enough to appear in the [[BIOS]] HDD setup<ref>[http://www.kva.kursk.ru/bios1/HTML1/standard.html Kursk: BIOS Settings - Standard CMOS Setup, Feb 12, 2000]</ref> although it is now handled automatically by the HDD.

== Further Developments ==

=== Generalized PRML ===

PR4 is characterized by an equalization target (+1, 0, -1) in bit-response sample values or (1+D)(1-D) in polynomial notation (here, D is the delay operator referring to a one sample delay). The target (+1, +1, -1, -1) or (1+D)(1-D)^2 is called Extended PRML (or EPMRL). The entire family, (1+D)1-D)^n, was investigated by Thapar and Patel.<ref>[https://ieeexplore.ieee.org/document/1065230 H.Thapar, A.Patel, "A Class of Partial Response Systems for Increasing Storage Density in Magnetic Recording", IEEE Trans. Magn., vol. 23, No. 5, pp.3666-3668 Sept. 1987]</ref>. The targets with larger n value tend to be more suited to channels with poor high-frequency response. This series of targets all have integer sample values and form an open [[Eye pattern|eye-pattern]] (e.g. PR4 forms a ternary eye). In general, however, the target can have non-integer values. The classical approach to maximum-likelihood detection on a channel with intersymbol interference (ISI) is to equalize to a minimum-phase, whitened, matched-filter target.<ref>[https://ieeexplore.ieee.org/document/1054829 D. Forney, "Maximum Likelihood Sequence Estimation of Digital Sequences in the Presence of Intersymbol Interference", IEEE Trans. Info. Theory, vol. IT-18, pp. 363-378, May 1972.]</ref>. The complexity of the subsequent Viterbi detector increases exponentially with the target length - the number of states doubling for each 1-sample increase in target length.

=== Post-processor architecture ===

Given the rapid increase in complexity with longer targets, a post-processor architecture was proposed, firstly for EPRML.<ref>[https://ieeexplore.ieee.org/document/281375 R. Wood, "Turbo-PRML, A Compromise EPRML Detector", IEEE Trans. Magn., Vol. MAG-29, No. 6, pp. 4018-4020, Nov. 1993]</ref>. With this approach a relatively simple detector (e.g. PRML) is followed by a post-processor which examines the residual waveform error and looks for the occurrence of likely bit pattern errors. This approach was found to be valuable when it was extended to systems employing a simple parity check<ref>[https://www.researchgate.net/publication/328870436 M. Despotovic, V. Senk, "Data Detection", Chapter 32 in ''Coding and Signal Processing for Magnetic Recording Systems'' edited by B. Vasic, E. Kurtas, CRC Press 2004]</ref>

=== PRML with Nonlinearities and Signal-dependent Noise ===

As data detectors became more sophisticated, it was found important to deal with any residual signal nonlinearities as well as pattern-dependent noise (noise tends to be largest when there is a magnetic transition between bits) including changes in noise-spectrum with data-pattern. To this end, the Viterbi-detector was modified such that it recognized the expected signal-level and expected noise variance associated with each bit-pattern. As a final step, the detectors were modified to include a 'noise predictor filter' thus allowing each pattern to havve a different noise=-spectrum. Such detectors are referred to as Pattern-Dependent Noise-Prediction (PDNP) detectors<ref>[https://ieeexplore.ieee.org/abstract/document/920181 J. Moon, J. Park, “Pattern-dependent noise prediction in signal dependent noise,” IEEE J. Sel. Areas Commun., vol. 19, no. 4, pp. 730–743, Apr. 2001]</ref> or [[noise-predictive maximum-likelihood detection|noise-predictive maximum-likelihood detectors]] (NPML)<ref>[https://ieeexplore.ieee.org/document/539233 E. Eleftheriou, W. Hirt, "Improving Performance of PRML/EPRML through Noise Prediction". IEEE Trans. Magn. Vol. 32, No. 5, pp. 3968–3970, Sept. 1996]</ref> <br>

== Recent Read/Write Electronics ==

Although the PRML acronym is still occasionally used, the most advanced detectors today (as of 2017) are around a million times more complex (gate-count) than the first PRML channel and operate about 100 times the data-rate (up to 3 Gbit/s). The analog front-end typically includes [[Automatic_gain_control|AGC]], correction for the nonlinear read-element response, and a low-pass filter with control over the high-frequency boost or cut. Equalization is done after the A/D with a digital [[Finite_impulse_response|FIR]] equalizer. ([https://en.wikipedia.org/wiki/Draft:Two-Dimensional_Magnetic_Recording TDMR] uses a 2-input, 1-output equalizer.) The detector uses the PDNP/NPML approach but the hard-decision Viterbi algorithm is replaced with a detector providing soft-outputs (additional information about the reliability of each bit). Such detectors using a 'soft Viterbi algorithm' or [[BCJR]] algorithm are essential in iteratively decoding [[LDPC]] codes used in modern HDDs. A single integrated circuit contains the entire R/W channel (including the iterative decoder) as well as all the disk control and interface functions. There are two suppliers: [[Broadcom]] and [[Marvell Technology Group|Marvell]].<ref>[https://www.marvell.com/storage/assets/Marvell_88i9422_Soleil_pb_FINAL.pdf Marvell 88i9422 Soleil SATA HDD Controller., Sept 2015]</ref>.

== See also ==