Field-programmable analog array: Difference between revisions

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Revision as of 21:02, 7 December 2019

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A '''field-programmable analog array''' ('''FPAA''') is an [[Integrated circuit|integrated circuit device]] containing computational [[Analog signal|analog]] blocks (CAB)<ref>{{cite journal |last1=Hall |first1=Tyson |last2=Twigg |first2=Christopher |last3=Hassler |first3=Paul |last4=Anderson |first4=David |title=APPLICATION PERFORMANCE OF ELEMENTS IN A FLOATING–GATE FPAA |journal=IEEE-ISCASIscas 2004 |date=2004 |volume=II |pages=589–592}}</ref><ref>{{cite journal |last1=Baskaya |first1=F. |last2=Reddy |first2=S. |last3=Sung |first3=Kyu Lim |last4=Anderson |first4=D.V. |title=Placement for large-scale floating-gate field-programable analog arrays |journal=IEEE Transactions on VLSI Systems |date=August 2006|volume=14 |issue=8 |pages=906–910 |url=https://www.computer.org/csdl/trans/si/2006/08/01664910-abs.html|doi=10.1109/TVLSI.2006.878477 }}</ref> and interconnects between these blocks offering [[field-programmability]]. Unlike their [[Digital signal|digital]] cousin, the [[Field-programmable gate array|FPGA]], the devices tend to be more application driven than general purpose as they may be [[Current-mode logic|current mode]] or voltage mode devices. For voltage mode devices, each block usually contains an [[operational amplifier]] in combination with programmable configuration of passive components. The blocks can, for example, act as [[Analog adder|summers]] or [[integrator]]s.

FPAAs usually operate in one of two modes: [[Discrete time and continuous time|''continuous time'' and ''discrete time'']].

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The '''reconfigurable analog signal processor''' ('''RASP''') and a second version were introduced in 2002 by Hall et al.<ref name="6 Hall">{{cite web|url=https://pdfs.semanticscholar.org/354a/bb6fa51506645957efe5effe18741dba0699.pdf|title=Field Programmable Analog Arrays: A Floating-Gate Approach}}</ref><ref name="7 Hall">{{cite web|url=https://ieeexplore.ieee.org/document/1528675/|title=Large scale field programmable analog arrays for analog signal processing}}</ref> Their design incorporated high-level elements such as second order [[Band-pass filter|bandpass filters]] and 4 by 4 vector matrix multipliers into the CABs. Because of its architecture, it is limited to around 100&nbsp;kHz and the chip itself is not able to support independent reconfiguration.

In 2004 Joachim Becker picked up the [[parallel connection]] of OTAs (operational transconductance amplifiers) and proposed its use in a hexagonal local interconnection architecture.<ref name="8 Becker">{{cite web|url=http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.444.8748&rep=rep1&type=pdfjournal|title=.,"A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable GM-cells|citeseerx = 10.1.1.444.8748}}</ref> It did not require a routing network and eliminated switching the signal path that enhances the frequency response.

In 2005 Fabian Henrici worked with Joachim Becker to develop a switchable and invertible OTA which doubled the maximum FPAA bandwidth.<ref name="9 Becker">{{cite web|url=http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.444.8748&rep=rep1&type=pdfjournal|title=A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13 µm CMOS with 186MHz GBW|citeseerx = 10.1.1.444.8748}}</ref> This collaboration resulted in the first manufactured FPAA in a [[130 nanometer|0.13&nbsp;µm]] [[CMOS]] technology

==See also==