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Chip memory works in AGA with the some clock as in OCS/ECS. Badwidth was doubled by using better technology. http://www.devili.iki.fi/mirrors/4x4.hopto.org/01SystemSoftware.zip SystemSoftware_p0001.png |
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== Technical details ==
In order to increase memory bandwidth, the [[Chip RAM]] data bus was extended to 32-bit width as in the [[Amiga 3000|A3000]] (unlike AGA, the A3000's Chip RAM is 32-bit for CPU access only) and the Alice chip (replacing [[Original Chip Set|OCS]]/[[Amiga Enhanced Chip Set|ECS]] [[MOS Technology Agnus|Agnus]]) was improved to be able to support full-width access for bitplane DMA.
Lisa (replacing former [[Original Chip Set#Denise|Denise]]) adds support for 8-bit bitplane data fetches, 256 instances of 24-bit palette registers, and for 32-bit data transfer for bitplane graphic and [[Sprite (computer graphics)|sprites]].
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