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Professor John D. Kubiatowicz considers traditionally SMP systems to contain processors without caches.<ref>{{cite conference|url=https://parlab.eecs.berkeley.edu/2013bootcampagenda|conference=2013 Short Course on Parallel Programming|author=John Kubiatowicz|title=Introduction to Parallel Architectures and Pthreads}}</ref> Culler and Pal-Singh in their 1998 book "Parallel Computer Architecture: A Hardware/Software Approach" mention: "The term SMP is widely used but causes a bit of confusion. [...] The more precise description of what is intended by SMP is a shared memory multiprocessor where the cost of accessing a memory ___location is the same for all processors; that is, it has uniform access costs when the access actually is to memory. If the ___location is cached, the access will be faster, but cache access times and memory access times are the same on all processors."<ref>{{cite book|isbn=978-1558603431|author1=David Culler|authorlink1=David Culler|author2=Jaswinder Pal Singh|author3=Anoop Gupta|title=Parallel Computer Architecture: A Hardware/Software Approach|url=https://books.google.com/books?id=MHfHC4Wf3K0C&pg=PA32|page=47|year=1999|publisher=[[Morgan Kaufmann]]}}</ref>
SMP systems are ''[[multiprocessing#Processor coupling|tightly coupled multiprocessor]] systems'' with a pool of homogeneous processors running independently of each other. Each processor, executing different programs and working on different sets of data, has the capability of sharing common resources (memory, I/O device, interrupt system and so on) that are connected using a [[system bus]] or a [[crossbar switch|crossbar]].
== Design ==
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