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== The Hardware Abstraction Layer ==
oneAPI Level Zero<ref>{{Cite web|url=https://www.tomshardware.com/news/intel-releases-bare-metal-oneapi-level-zero-specification|title=Intel Releases Bare-Metal oneAPI Level Zero Specification|last=Verheyde 2019-12-08T16:11:19Z|first=Arne|website=Tom's Hardware|language=en|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.phoronix.com/scan.php?page=news_item&px=Intel-oneAPI-Level-Zero|title=Intel's Compute Runtime Adds oneAPI Level Zero Support - Phoronix|website=www.phoronix.com|access-date=2020-03-10}}</ref><ref>{{Cite web|url=https://www.phoronix.com/scan.php?page=article&item=intel-level-zero&num=1|title=Initial Benchmarks With Intel oneAPI Level Zero Performance - Phoronix|website=www.phoronix.com|access-date=2020-04-13}}</ref>, the low-level hardware interface, defines a set of capabilities and services that a hardware accelerator needs to interface with compiler runtimes and other developer tools.
== Implementations ==
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