In most modern computer architectures, there is some division of floating-point operations from [[integer]] operations. This division varies significantly by architecture; some have dedicated [[floating-point register]]s, while some, like the [[X86 architecture|Intel x86]], take it as far as independent [[computer clock|clocking]] schemes.<ref>{{Cite web |url=http://www.cpu-world.com/CPUs/80287/index.html |title=Intel 80287 family |website=www.cpu-world.com |access-date=2019-01-15}}</ref>
CORDIC routines have been implemented in the [[Intel]][[Intel 8087|8087]],<ref name="Muller_2006">{{cite book |author-first=Jean-Michel |author-last=Muller |title=Elementary Functions: Algorithms and Implementation |edition=2 |publisher=[[Birkhäuser]] |___location=Boston |date=2006 |page=134 |isbn=978-0-8176-4372-0 |lccn=2005048094 |url=http://perso.ens-lyon.fr/jean-michel.muller/SecondEdition.html |access-date=2015-12-01}}</ref><ref name="Nave_1983">{{cite journal |author-first=Rafi |author-last=Nave |title=Implementation of Transcendental Functions on a Numerics Processor |journal=Microprocessing and Microprogramming |volume=11 |issue=3–4 |pages=221–225 |date=March<!-- /April--> 1983|doi=10.1016/0165-6074(83)90151-5 }}</ref><ref name="Palmer_1984">{{cite book |title=The 8087 Primer |author-first1=John F. |author-last1=Palmer |author-first2=Stephen Paul |author-last2=Morse |author-link2=Stephen Paul Morse |publisher=[[John Wiley & Sons Australia, Limited]] |date=1984 |edition=1 |isbn=0471875694 |id=9780471875697 |url=https://archive.org/details/8087primer00palm |url-access=registration |access-date=2016-01-02}}</ref><ref name="Glass_1990">{{cite journal |title=Math Coprocessors: A look at what they do, and how they do it |author-first=L. Brent |author-last=Glass |journal=[[Byte (magazine)|Byte]] |volume=15 |issue=1 |date=January 1990 |pages=337–348 |issn=0360-5280}}</ref><ref name="Jarvis_1990">{{cite journal |title=Implementing CORDIC algorithms - A single compact routine for computing transcendental functions |author-first=Pitts |author-last=Jarvis |date=1990-10-01 |journal=[[Dr. Dobb's Journal]] |pages=152–156 |url=http://www.drdobbs.com/database/implementing-cordic-algorithms/184408428 |access-date=2016-01-02}}</ref> [[Intel 80287|80287]],<ref name="Jarvis_1990"/><ref name="Yuen_1988">{{cite journal |title=Intel's Floating-Point Processors |author-first=A. K. |author-last=Yuen |journal=Electro/88 Conference Record |pages=48/5/1–7 |date=1988}}</ref> [[Intel 80387|80387]]<ref name="Jarvis_1990"/><ref name="Yuen_1988"/> up to the [[Intel 80486|80486]]<ref name="Muller_2006"/> coprocessor series, as well as in the [[Motorola]][[Motorola 68881|68881]]<ref name="Muller_2006"/><ref name="Nave_1983"/> and [[Motorola 68882|68882]] for some kinds of floating-point instructions, mainly as a way to reduce the [[Logic gate|gate]] counts (and complexity) of the FPU subsystem.
Floating-point operations are often [[instruction pipelining|pipelined]]. In earlier [[superscalar]] architectures without general [[out-of-order execution]], floating-point operations were sometimes pipelined separately from integer operations.
