Instruction scheduling: Difference between revisions

Revision as of 00:26, 1 September 2020

Revision as of 00:29, 1 September 2020

Line 53:

Sources of information on latency and port usage include:

* GCC and LLVM;

* [[Agner Fog]], who compiles extensive data for the [[x86 architecture]], using a tool he wrote;<ref name="optimize">{{cite web |title=Software optimization resources. C++ and assembly. Windows, Linux, BSD, Mac OS X |url=https://www.agner.org/optimize/ |website=Agner Fog}}</ref>

* InstLatx64, which uses [[AIDA64]] to collect data on x86 CPUs.<ref>{{cite web |title=x86, x64 Instruction Latency, Memory Latency and CPUID dumps |url=http://instlatx64.atw.hu/ |website=instlatx64.atw.hu}}</ref>