Multi-channel memory architecture: Difference between revisions

Revision as of 04:44, 21 June 2020

Revision as of 00:25, 2 September 2020

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When operating in triple-channel mode, [[memory latency]] is reduced due to interleaving, meaning that each module is accessed sequentially for smaller bits of data rather than completely filling up one module before accessing the next one. Data is spread amongst the modules in an alternating pattern, potentially tripling available memory bandwidth for the same amount of data, as opposed to storing it all on one module.

The architecture can only be used when all three, or a multiple of three, memory modules are identical in capacity and speed, and are placed in three-channel slots. When two memory modules are installed, the architecture will operate in dual-channel architecture mode.<ref name="support.intel.com">{{Citation | title = Desktop Boards – Triple Memory Modules | publisher = Intel | url= http://support.intel.com/support/motherboards/desktop/sb/CS-011965.htm#triple|publisher=Intel}}, [https://www.intel.com/content/www/us/en/support/articles/000005657/boards-and-kits.html Single- and Multichannel Memory Modes]</ref>

=== Supporting processors ===