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In [[computing]], a '''programmable interrupt controller''' ('''PIC''') is an [[integrated circuit]] that helps a [[microprocessor]] (or [[CPU]]) to handle [[Interrupt request (PC architecture)|interrupt requests]] (IRQ) coming from multiple different sources (like external I/O devices) which may come (get fired) simultaneously.<ref>{{cite journal|title=A Revisitation of Kernel Synchronization Schemes
|authors=Christopher Small and Stephen Manley
|url=https://static.usenix.org/publications/library/proceedings/ana97/full_papers/small/small.html}}</ref> It helps to prioritize IRQs so that CPU switches execution to the most appropriate [[interrupt handler]] (ISR) after the PIC assesses the IRQs' relative priorities. Common modes of a PIC include hard priorities, rotating priorities, and cascading priorities.{{Citation needed|date=July 2011}} PICs often allow the cascading of their outputs to inputs between each other. On [[PC architecture]] PIC are typically ebedded into a [[Southbridge (computing)|southbridge chips]] whose internal architecture is defined by chipsets' vendors' standards.
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