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→Applications: citation to Chekurov et al 2009 (Fabrication of silicon nanostructures by local gallium..) - not sure if there's a "researchgate" parameter for cite template yet.. |
Citation bot (talk | contribs) Alter: url. URLs might have been internationalized/anonymized. Add: pmid, s2cid, author pars. 1-1. Removed parameters. Some additions/deletions were actually parameter name changes. | You can use this bot yourself. Report bugs here. | Suggested by Abductive | Category:Semiconductor device fabrication | via #UCB_Category 150/170 |
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* in MEMS, DRIE is used for anything from a few micrometers to 0.5 mm.
* in irregular chip dicing, DRIE is used with a novel hybrid soft/hard mask to achieve sub-millimeter etching to dice silicon dies into lego-like pieces with irregular shapes.<ref>{{cite journal | last1= Ghoneim | first1= Mohamed | last2 = Hussain | first2= Muhammad | title = Highly Manufacturable Deep (Sub-Millimeter) Etching Enabled High Aspect Ratio Complex Geometry Lego-Like Silicon Electronics| journal= Small | date= 1 February 2017 | doi=10.1002/smll.201601801 | pmid= 28145623 | volume=13 | issue= 16 | page=1601801| hdl= 10754/622865 | url= https://repository.kaust.edu.sa/bitstream/10754/622865/1/smll.201601801_R2.pdf }}</ref><ref>{{cite news | last= Mendis | first= Lakshini | title= Lego-like Electronics | newspaper= Nature Middle East | date= 14 February 2017 | doi= 10.1038/nmiddleeast.2017.34 }}</ref><ref>{{cite news | last= Berger | first= Michael | title=Lego like silicon electronics fabricated with hybrid etching masks | newspaper= Nanowerk | date= 6 February 2017 | url= http://www.nanowerk.com/spotlight/spotid=45763.php}}</ref>
* in flexible electronics, DRIE is used to make traditional monolithic CMOS devices flexible by reducing the thickness of silicon substrates to few to tens of micrometers.<ref>{{ cite journal | last1= Ghoneim | first1= Mohamed | first2=Nasir | last2=Alfaraj | first3=Galo | last3=Torres-Sevilla | first4=Hossain | last4=Fahad | first5=Muhammad | last5=Hussain | title=Out-of-Plane Strain Effects on Physically Flexible FinFET CMOS | journal=IEEE Transactions on Electron Devices | volume= 63 | issue= 7 | pages= 2657–2664 | date= July 2016 | doi=10.1109/ted.2016.2561239| hdl= 10754/610712 | bibcode= 2016ITED...63.2657G | s2cid= 26592108 | hdl-access=free }}</ref><ref>{{ cite journal | first1= Mohamed T. | last1= Ghoneim | first2= Muhammad M. | last2= Hussain | title=Review on physically flexible nonvolatile memory for internet of everything electronics | journal= Electronics | volume= 4 | issue= 3 | pages= 424–479 | date=23 July 2015 | arxiv= 1606.08404 | doi= 10.3390/electronics4030424 | s2cid= 666307 }}</ref><ref>{{cite journal | first1= Mohamed T. | last1= Ghoneim | first2= Muhammad M. | last2= Hussain | title=Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric | journal=Applied Physics Letters | date=3 August 2015 | doi=10.1063/1.4927913 | volume=107 | issue= 5 | page=052904| hdl= 10754/565819 | url=https://repository.kaust.edu.sa/bitstream/10754/565819/1/1.4927913.pdf | bibcode= 2015ApPhL.107e2904G }}</ref><ref>{{cite journal | first1=Mohamed T. | last1=Ghoneim | first2=Jhonathan P. | last2=Rojas | first3=Chadwin D. | last3=Young | first4=Gennadi | last4=Bersuker | first5=Muhammad M. | last5=Hussain | title=Electrical Analysis of High Dielectric Constant Insulator and Metal Gate Metal Oxide Semiconductor Capacitors on Flexible Bulk Mono-Crystalline Silicon | journal= IEEE Transactions on Reliability | volume=64 | issue=2 | pages=579–585 | date=26 November 2014 | doi=10.1109/TR.2014.2371054 | s2cid=11483790 }}</ref><ref>{{cite journal | first1=Mohamed T. | last1=Ghoneim | first2=Mohammed A. | last2=Zidan | first3=Mohammed Y. | last3=Alnassar | first4=Amir N. | last4=Hanna | first5=Jurgen | last5= Kosel | first6=Khaled N. | last6=Salama | first7=Muhammad | last7=Hussain | title=Flexible Electronics: Thin PZT-Based Ferroelectric Capacitors on Flexible Silicon for Nonvolatile Memory Applications | journal=Advanced Electronic Materials | date=15 June 2015 | doi=10.1002/aelm.201500045 | volume=1 | issue=6 | page=1500045}}</ref><ref>{{cite journal | first1=Mohamed T. | last1=Ghoneim |first2=Arwa | last2=Kutbee | first3=Farzan | last3=Ghodsi | first4=G. |last4=Bersuker | first5=Muhammad M. | last5=Hussain | title=Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric | journal= Applied Physics Letters | date=9 June 2014 | doi=10.1063/1.4882647 | volume=104 | issue=23 | page=234104| hdl=10754/552155 | url=http://repository.kaust.edu.sa/kaust/bitstream/10754/552155/1/1.4882647.pdf | bibcode=2014ApPhL.104w4104G }}</ref>
What distinguishes DRIE from RIE is etch depth: Practical etch depths for RIE (as used in [[integrated circuit|IC]] manufacturing) would be limited to around 10 µm at a rate up to 1 µm/min, while DRIE can etch features much greater, up to 600 µm or more with rates up to 20 µm/min or more in some applications.
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DRIE of glass requires high plasma power, which makes it difficult to find suitable mask materials for truly deep etching. Polysilicon and nickel are used for 10–50 µm etched depths. In DRIE of polymers, Bosch process with alternating steps of SF<sub>6</sub> etching and C<sub>4</sub>F<sub>8</sub> passivation take place. Metal masks can be used, however they are expensive to use since several additional photo and deposition steps are always required. Metal masks are not necessary however on various substrates (Si [up to 800 µm], InP [up to 40 µm] or glass [up to 12 µm]) if using chemically amplified negative resists.
Gallium ion implantion can be used as etch mask in cryo-DRIE. Combined nanofabrication process of focused ion beam and cryo-DRIE was first reported by N Chekurov ''et al'' in their article "The fabrication of silicon nanostructures by local gallium implantation and cryogenic deep reactive ion etching".<ref>{{cite journal |last1=Chekurov |first1=N |last2=Grigoras |first2=K |last3=Peltonen |first3=A |last4=Franssila |first4=S |last5=Tittonen |first5=I |display-authors=2 |title=The fabrication of silicon nanostructures by local gallium implantation and cryogenic deep reactive ion etching |journal=Nanotechnology |date=11 February 2009 |volume=20 |issue=6 |pages=065307 |doi=10.1088/0957-4484/20/6/065307 |pmid=19417383 |url=https://www.researchgate.net/publication/
===Precision Machinery===
DRIE has enabled the use of silicon mechanical components in high-end wristwatches. According to an engineer at [[Cartier (jeweler)|Cartier]], “There is no limit to geometric shapes with DRIE,”.<ref>{{cite news | last = Kolesnikov-Jessop | first = Sonia | title = Precise Future of Silicon Parts Still Being Debated | newspaper = The New York Times | ___location = New York | date = 23 November 2012 | url = https://www.nytimes.com/2012/11/24/fashion/24iht-acaw2-silicon24.html }}</ref> With DRIE it is possible to obtain an [[aspect ratio]] of 30 or more,<ref>{{cite journal |
This has allowed for silicon components to be substituted for some parts which are usually made of steel, such as the [[hairspring]]. Silicon is lighter and harder than steel, which carries benefits but makes the manufacturing process more challenging.
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