Memory segmentation: Difference between revisions

Revision as of 18:33, 9 November 2020

Revision as of 20:46, 13 December 2020

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Different segments may be created for different program [[module (programming)|module]]s, or for different classes of memory usage such as [[Code segment|code]] and [[data segment]]s.<ref name="glaser1965"/> Certain segments may be shared between programs.<ref name="holt1961"/><ref name="englander" />

Segmentation was originally invented as a method by which [[system software]] could isolate different software [[Process (computing)|processes]] ([[Task (computing)|tasks]]) and data they are using. It was intended to increase reliability of the systems running multiple processes simultaneously.<ref name=":0">{{Cite book|url=https://www.amd.com/system/files/TechDocs/24594.pdf|title=AMD64 Technology AMD64 Architecture Programmer’s Manual Volume 2: System Programming|last=|first=|publisher=Advanced Micro Devices|year=2018|isbn=|volume=2|___location=|pages=5|language=en|chapter=1.2 Memory Management}}</ref> In a [[X86-64|x86-64 architecture]] it is considered legacy and most x86-64-based modern system software don't use memory segmentation. Instead they handle programs and their data by utilizing [[Paging|memory-paging]] which also serves as a way of memory protection. However most x86-64 implementations still support it for backward compatibility reasons.<ref name=":0" />

==Hardware implementation==

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==History==

The [[Burroughs Corporation]] [[Burroughs large systems|B5000]] computer was one of the first to implement segmentation, and "perhaps the first commercial computer to provide virtual memory"<ref>{{cite web|last=Mayer|first=Alastair J.W.|title=The Architecture of the Burroughs B5000 - 20 Years Later and Still Ahead of the Times?|url=http://www.smecc.org/The%20Architecture%20%20of%20the%20Burroughs%20B-5000.htm|accessdateaccess-date=March 15, 2012}}</ref> based on segmentation. The later [[Burroughs large systems#B6500|B6500]] computer also implemented segmentation; a version of its architecture is still in use today on the Unisys ClearPath Libra servers.

The [[GE-600 series|GE-645]] computer, a modification of the GE-635 with segmentation and paging support added, was designed in 1964 to support [[Multics]].

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The [[Intel 80386]] and later processors also support paging; in those processors, the segment table, rather than pointing to a page table for the segment, contains the segment address in ''linear memory''. Addresses in linear memory are then mapped to physical addresses using a separate page table, if paging is enabled.

The [[x86-64]] architecture does not use segmentation in long mode (64-bit mode).<ref name=":1">{{Cite book|url=https://www.amd.com/system/files/TechDocs/24594.pdf|title=AMD64 Technology AMD64 Architecture Programmer’s Manual Volume 2: System Programming|last=|first=|publisher=Advanced Micro Devices|year=2018|isbn=|volume=2|___location=|pages=|language=en}}</ref> In a [[X86-64|x86-64 architecture]] it is considered legacy and most x86-64-based modern system software don't use memory segmentation. Instead they handle programs and their data by utilizing [[Paging|memory-paging]] which also serves as a way of memory protection. Though most x86-64 implementations still support it for backward compatibility reasons.<ref name=":0" /> Four of the segment registers: CS, SS, DS, and ES are forced to 0, and the limit to 2⁶⁴. The segment registers FS and GS can still have a nonzero base address. This allows operating systems to use these segments for special purposes.

== See also ==