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{{primary sources|date=July 2013}}
{{n-bit|512|(64 [[octet (computing)|octets]])}}
There are currently no mainstream general-purpose [[CPU|processors]] built to operate on 512-bit integers or addresses, though a number of processors do operate on 512-bit data. {{As of|2013}}, the [[Xeon Phi|Intel Xeon Phi]] has a [[vector processing unit]] with 512-bit vector registers, each one holding sixteen 32-bit elements or eight 64-bit elements, and a single instruction can operate on all these values in parallel. However, the Xeon Phi's vector processing unit does not operate on individual numbers that are 512 bits in length.<ref>{{cite web|url=https://software.intel.com/sites/default/files/managed/09/07/xeon-phi-coprocessor-system-software-developers-guide.pdf|title=Intel Xeon Phi Coprocessor System Software Developers Guide|publisher=[[Intel]]|date=March 2014|
==Uses==
[[File:Sapphire Radeon R9 290X-front oblique PNr°0437.jpg|thumb|The AMD [[Radeon R9]] 290X (Sapphire OEM version pictured here) uses a 512 bit memory bus]]
* Some GPUs such as the [[AMD]] [[Radeon_HD_2000_series#Radeon_HD_2900|Radeon HD 2900XT]], the [[Nvidia]] GTX 280,<ref>{{cite web|url=http://www.geforce.com/hardware/desktop-gpus/geforce-gtx-280/specifications |title=GTX 280 | Specifications |publisher=GeForce |access-date
* Many [[hash functions]], such as [[SHA-512]] and [[SHA3-512]], have a 512-bit output.
* [[AVX-512]] are 512-bit extensions to the 256-bit [[Advanced Vector Extensions]] SIMD instructions for x86 [[instruction set architecture]] proposed by Intel in July 2013, and released on 2016 with [[Xeon Phi#Knights Landing|Knights Landing]], and in 2017 on the HEDT and consumer server platform, with Skylake-X and [[Skylake (microarchitecture)#"Skylake-SP" (14 nm) Scalable Performance|Skylake-SP]] respectively.
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