Cellular neural network: Difference between revisions

Revision as of 07:12, 27 December 2020

Revision as of 07:18, 27 December 2020

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=== AnaFocus, AnaLogic ===

In the 2000s, AnaFocus, a mixed-signal semiconductor company from the the [[University of Seville]], introduced their ACE prototype CNN processor product line. Their first ACE processor contained 20x20 B/W processor units; and subsequent processors provided 48x48 and 128x128 grayscale processor units, improving the speed and processing elements. AnaFocus also had a multilayer CASE prototype CNN processors line. Their processors allowed real-time interaction between the sensing and processing. In 2014, AnaFocus had been sold to e2v technologies.<ref>{{Cite web|title=Acquisition of AnaFocus: Fast-growing CMOS imaging business to be integrated into High Performance Imaging division|url=https://www.teledyne-e2v.com/news/acquisition-of-anafocus-fast-growing-cmos-imaging-business-to-be-integrated-into-high-performance-imaging-division/|access-date=2020-12-27|website=e2v}}</ref>

Another company, AnaLogic Computers was founded in 2000 by many of the same researchers behind the first algorithmically programmable CNN Universal Processor.

AnaFocus is working with AnaLogic Computers, to include their CNN processors into visual systems. Founded in 2000, by many of the same researchers behind the first algorithmically programmable CNN Universal Processor, AnaLogic Computers mission is to commercialize high-speed, biologically inspired systems based on CNN processors. In 2003, AnaLogic Computers developed a PCI-X visual processor board that included the ACE 4K processor, with a Texas Instrument DIP module and a high-speed frame-grabber. This allowed CNN processing to be easily included in a desktop computer, considerably improving the usability and capability of CNN analog processors. In 2006, AnaLogic Computers developed their Bi-I Ultra High Speed Smart Camera product line, which includes the ACE 4K processor in their high-end models. The product that their development team is now pursuing is the Bionic Eyeglass. The Bionic Eyeglass is a dual-camera, wearable platform, based on the Bi-I Ultra High Speed Smart Camera, designed to provide assistance to blind people. Some of the functions that the Bionic Eyeglass system will perform is route number recognition and color processing.

In 2003, AnaLogic Computers developed a PCI-X visual processor board that included the ACE 4K processor,<ref>{{Cite web|title=StackPath|url=https://www.vision-systems.com/home/article/16738443/cellular-device-processes-at-ultrafast-speeds|access-date=2020-12-27|website=www.vision-systems.com}}</ref> with a [[Texas Instruments|Texas Instrument]] DIP module and a high-speed frame-grabber. This allowed CNN processing to be easily included in a desktop computer. In 2006, AnaLogic Computers developed their Bi-I Ultra High Speed Smart Camera product line, which includes the ACE 4K processor in their high-end models. In 2006, Roska et al. published a paper on designing a Bionic Eyeglass for AnaLogic. The Bionic Eyeglass is a dual-camera, wearable platform, based on the Bi-I Ultra High Speed Smart Camera, designed to provide assistance to blind people. Some of its functions include route number recognition and color processing.<ref>{{Cite journal|last=Roska|first=T.|last2=Balya|first2=D.|last3=Lazar|first3=A.|last4=Karacs|first4=K.|last5=Wagner|first5=R.|last6=Szuhaj|first6=M.|date=2006-05|title=System aspects of a bionic eyeglass|url=https://ieeexplore.ieee.org/document/1692547|journal=2006 IEEE International Symposium on Circuits and Systems|pages=4 pp.–164|doi=10.1109/ISCAS.2006.1692547}}</ref>

=== Analog CNN processors ===

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* A research team from University degli Studi di Catania made one in order to generate gaits for a hexapod robot.

* Researchers from [[National Chiao Tung University]] designed a RM-CNN processor to learn more about pattern learning and recognition.

* Researchers from the National Lien-Ho Institute of Technology developed a Min-Max CNN (MMCNN) processor to learn more about CNN dynamics.

Despite their speed and low power consumption, there are some significant drawbacks to analog CNN processors. First, analog CNN processors can potentially create erroneous results due to environment and process variation. In most applications, these errors are not noticeable, but there are situations where minor deviations can result in catastrophic system failures. For example, in chaotic communication, process variation will change the [[trajectory]] of a given system in phase space, resulting in a loss of synchronicity/stability. Due to the severity of the problem, there is considerable research being performed to ameliorate the problem. Some researchers are optimizing templates to accommodate greater variation. Other researchers are improving the semiconductor process to more closely match theoretical CNN performance. Other researchers are investigating different, potentially more robust CNN architectures. Lastly, researchers are developing methods to tune templates to target a specific chip and operating conditions. In other words, the templates are being optimized to match the information processing platform. Not only does process variation limit what can be done with current analog CNN processors, it is also a barrier for creating more complex processing units. Unless this process variation is resolved, ideas such as nested processing units, non-linear inputs, etc. cannot be implemented in a real-time analog CNN processor. Also, the semiconductor "real estate" for processing units limits the size of CNN processors.

Currently the largest AnaVision CNN-based vision processor consists of a 4K detector, which is significantly less than the megapixel detectors found in affordable, consumer cameras. Unfortunately, feature size reductions, as predicted by [[Moore’s Law]], will only result in minor improvements. For this reason, alternate technologies such as Resonant Tunneling Diodes and Neuron-Bipolar Junction Transistors are being explored. Also, the architecture of CNN processors is being reevaluated. For example, Star-CNN processors, where one analog multiplier is time-shared between multiple processor units, have been proposed and are expected to result in processor unit reduction size of eighty percent.

=== Digital CNN processors, FPGA ===