Advanced Programmable Interrupt Controller: Difference between revisions

Revision as of 02:13, 7 December 2020

Revision as of 09:53, 30 December 2020

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== Competition ==

{{further|OpenPIC and IBM MPIC}}

[[AMD]] and [[Cyrix]] once proposed a somewhat similar-in-purpose [[OpenPIC]] architecture supporting up to 32 processors;<ref>{{cite web|url=https://www.pcmag.com/encyclopedia_term/0,2542,t=OpenPIC&i=48497,00.asp |title=OpenPIC Definition from PC Magazine Encyclopedia |publisher=Pcmag.com |date=1994-12-01 |accessdateaccess-date=2011-11-03}}</ref> it had at least declarative support from [[IBM]] and [[Compaq]] around 1995.<ref name="Inc.1995">{{cite book|title=AMD, Cyrix offer up alternative SMP spec|author=Brooke Crothers|publisher=[[InfoWorld]]|url=https://books.google.com/books?id=lToEAAAAMBAJ&pg=PA8|date=20 March 1995|page=8|issn=0199-6649}}</ref> No x86 motherboard was released with OpenPIC however.<ref>André D. Balsa, [http://linuxgazette.net/issue24/Article3e-7.html Note attached to "Linux Benchmarking: Part III -- Interpreting Benchmark Results"] appearing in Issue 24 of Linux Gazette, January 1998</ref> After the OpenPIC's failure in the x86 market, AMD licensed Intel's APIC for its [[AMD Athlon]] and later processors.

IBM however developed their [[OpenPIC and MPIC|MultiProcessor Interrupt Controller]] (MPIC) based on the OpenPIC register specifications.<ref>IBM [https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F27971551C9EED8E8525774A0048770A/$file/mpic_db_05_16_2011.pdf Multiprocessor Interrupt Controller. Data Book] {{webarchive|url=https://web.archive.org/web/20140223012746/https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F27971551C9EED8E8525774A0048770A/%24file/mpic_db_05_16_2011.pdf |date=2014-02-23 }}</ref> MPIC was used in [[PowerPC]] based designs, including those of IBM, for instance in some [[RS/6000]] systems,<ref>Arca Systems TTAP Evaluation Facility [http://www.ashtonlabs.com/library/FERs/CSC-FER-98-004.pdf The IBM Corporation RS/6000 Distributed System Running AIX Version 4.3.1. TCSEC Evaluated C2 Security], p. 29</ref> but also by Apple, as late as their [[Power Mac G5]]s.<ref>{{cite book|url=http://www.informit.com/articles/article.aspx?p=606582|title=Take a Look Inside the G5-Based Dual-Processor Power Mac|first=Amit|last=Singh|date=13 October 2006|via=informIT database}}</ref><ref>[https://developer.apple.com/legacy/library/documentation/Hardware/Developer_Notes/Macintosh_CPUs-G5/PowerMacG5/PowerMacG5.pdf Power Mac G5 Developer Note (Legacy)], p. 26</ref>