Application-specific instruction set processor

This is an old revision of this page, as edited by Steven G Cox (talk | contribs) at 23:28, 18 June 2008 (References: Added IEEE reference regarding Chess/Checkers (IP Designer) from Gert Goossens, et al.). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

An application-specific instruction-set processor (ASIP) is a component used in System-on-a-Chip design. The instruction set of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC.

Some ASIPs have a configurable instruction set. Usually, these cores are divided into two parts: static logic which defines a minimum ISA and configurable logic which can be used to design new instructions. The configurable logic can be programmed either in the field in a similar fashion to an FPGA or during the chip synthesis.

References

  • Gert Goossens, Dirk Lanneer, Werner Geurts, Johan Van Praet (2006). Design of ASIPs in Multi-Processor SoCs using the Chess/Checkers Retargetable Tool Suite. Piscataway, NJ: IEEE. pp. 61–64. ISBN 1-4244-0621-8. {{cite book}}: |journal= ignored (help)CS1 maint: multiple names: authors list (link)
  • Paolo Ienne, Rainer Leupers (eds.) (2006). Customizable Embedded Processors. San Mateo, CA: Morgan Kaufmann. ISBN 978-0-12-369526-0. {{cite book}}: |author= has generic name (help)
  • Matthias Gries, Kurt Keutzer (eds.) (2005). Building ASIPs: The Mescal Methodology. New York: Springer. ISBN 978-0-387-26057-0. {{cite book}}: |author= has generic name (help)
  • Oliver Schliebusch, Heinrich Meyr, Rainer Leupers (2007). Optimized ASIP Synthesis from Architecture Description Language Models. Dordrecht: Springer. ISBN 978-1-4020-5685-7.{{cite book}}: CS1 maint: multiple names: authors list (link)
  • M. Jain, M. Balakrishnan, A. Kumar (2001). "ASIP Design Methodologies: Survey and Issues". Proceedings of the Fourteenth International Conference on VLSI Design. IEEE: 76–81.{{cite journal}}: CS1 maint: multiple names: authors list (link)