Open Artwork System Interchange Standard

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OASIS® (Open Artwork System Interchange Standard- SEMI P39) is an integrated circuit design and mask layout binary file format used as a cell and chip level representation and expression of physical (mostly geometric) layout data. The format represents layout data found in cell Libraries and represents data used in chip-level physical and mask layout design and manufacturing. Generally, the data within an OASIS file is organized by cell with, in some instances, lower-level references to other dependent cells. At the cell Library level, the layout for each cell is represented independently from the other cells within the Library. Ideally, all cell layout data is based on foundry-verified process data. There may be hundreds of thousands of cells within one Library. Typically, within a cell Library, there will be one OASIS data file for each cell. The cell Library may also contain a single merged OASIS file encapsulating all cells.

A cell can be a simple (NAND, OR, XOR, etc.) logic circuit or it can comprise as much as the entire functionality for an embedded microprocessor. The content of the cell is arbitrarily defined according to its anticipated use when connected with other cells during logic design. Mostly, a Library OASIS® file contains layer-by-layer transistor-level geometric (polygons) and non-geometric data that represents how, at the cell level, the cell should be manufactured. Not all cells within a cell Library are used in a single design.

A finished logic design shows how a set of cells chosen from a cell Library for a particular design are to be connected. Chip-level layout design uses a Netlist from Logic design to place cell-level OASIS® Library files from the same library used in Logic design and then add the routing that connects the placed cells together as one integrated circuit. After chip-level optimizations are made, the final output is a single OASIS data file containing optimized but still raw placement, routing and cell layer data for the entire integrated circuit.

Typically, the raw design layout data represented as OASIS® still requires finishing so that the layout, when transformed from data to shaped flashing beams of light and electrons actually print onto a mask or wafer as intended. For designs that are more advanced, the edges and the corners of the circuit features require a correction because they are too close to each other to be resolved lithographically without a correction. Furthermore, at least some of the features will be so small that without a correction, they will not expose evenly. The corrections are called Optical Proximity Correction (OPC) and Scatterbar (Assist feature) corrections. The corrections are added to the content of the raw OASIS data design representation.

Other adjustments to the data are made which are not covered here. However, once finished, the modified layout of the chip is fractured from a polygon-based representation to a geometrically equivalent representation of the data using smaller (machine-printable) geometric shapes. The fractured data is stored separately as a fractured OASIS data file. In some cases, the corrections plus fracturing can increase the size of the modified and fractured OASIS data file by as much as 10X.

OASIS® can be a very efficient representation of layout data. The file sizes for OASIS are 10-50X smaller than GDSII data files. Therefore, OASIS files use less disc space and can be moved, copied, pasted, uploaded, downloaded, etc. at rates up to 10-50X faster than of GDSII. If an OASIS data file requires that an operation be performed on the objects within the data file, there will be instances where the OASIS data will need to be expanded into memory from its compact state. Under this scenario, the time to expand (and compact) OASIS data essentially erases the runtime benefit over GDSII.

For there to be a operational-level runtime advantage using OASIS®, an operation must be able to perform whatever it needs to do on the canonical representation of equivalent data within the file and get the same result when expanded fully. In other words, if the operation can be performed correctly on only OASIS repetitions, it may be possible to improve operational-level runtime by up to 10X.

VLSI layout databases streaming in/out to OASIS® will not have a runtime advantage over GDSII because the format for today's Layout databases cannot accommodate the new OASIS record types such as OASIS repetitions. If tomorrow’s layout databases were able to store OASIS repetitions and other runtime-boosting data records, stream in/out runtime for OASIS would be faster by as much as 10X. The database itself would be 10X smaller as well.

There is a net gain using OASIS® over GDSII because file size on disc is 10-50X smaller and the runtime for OASIS files being shuttled from one place to another is as much as 10X faster. There is no significant runtime advantage for OASIS when there is a requirement that the data be expanded to its explicit form in memory before being operated on. However, there may be an opportunity to improve OASIS runtime for those operations, which do not require that OASIS repetitions first be expanded into memory.

Some other OASIS capabilities that are improvements over GDSII:

  • Squeeze out all of the wasted bits and redundant records.
  • Support two-dimensional figure arrays
  • Support vertical and horizontal trapezoid primitives
  • Support step-and-repeat figure description
  • Relax 16- and 32-bit integer restrictions
  • Use variable-width integers (8-64 bits)
  • Allow relative (Dx,Dy) coordinates in both step/repeat & figures
  • Relax restrictions on string length, including cell names
  • Relax restrictions on number of polygon vertices
  • Use IEEE standard 64-bit floating point numbers
  • Support layer name & purpose information
  • Support arbitrary named properties, integer & floating values
  • Support embedded comments

There are other enhancements within OASIS® not stated here directly. OASIS is now a formal industry standard that is owned and maintained by the trade and standards organization SEMI that serves the semiconductor materials and equipment industries worldwide. For a very small fee, the standard can be downloaded from the SEMI web-site. The link to SEMI's Standards page is below.

The SEMI P39 OASIS® standard was developed starting in the fall of 2001 by a consortium of volunteer Semiconductor, Electronic Design Automation and Mask Manufacturing companies and then donated to SEMI. The trade name OASIS® is a registered trademark owned by Thomas J. Grebinski, Alamo, California and licensed for use exclusively by SEMI).