Wikipedia

Universal synchronous and asynchronous receiver-transmitter

This is an old revision of this page, as edited by Raven Onthill (talk | contribs) at 06:19, 16 December 2015 (Added a link to an actual USART data sheet). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

A Universal Synchronous/Asynchronous Receiver/Transmitter (USART) is a type of a serial interface device that can be programmed to communicate asynchronously or synchronously. See UART for a discussion of the asynchronous capability of this device.

The USART's synchronous capabilities were primarily intended to support IBM's SDLC and the ISO-standard HDLC synchronous link-layer protocols, which were used with synchronous voice-frequency modems. These protocols were designed to make the best use of bandwidth while transmitting blocks of data when modems were analog devices. In those times, the fastest asynchronous voice-band modem could achieve at most speeds of 300 bps, while synchronous modems could run at speeds up to 9600 bps. In addition, synchronous transmission used only slightly over 80% of the bandwidth of the now more-familiar asynchronous transmission, since start and stop bits were unnecessary. Those modems are entirely obsolete, but similar synchronous telecommunications protocols survive in numerous block-oriented technologies, including the widely-used IEEE 802.2 (Ethernet) link-level protocol. An example of a USART was the Intel 8251A[1]. USART's, though apparently no longer manufactured as standalone components are often integrated with MCUs. (Does anyone know if any current protocol implementations rely on HDLC or SDLC framing?)

A synchronous line is never silent; data was always flowing. When the USART has nothing to transmit in synchronous mode, it sends a continuous stream of flag characters.

USARTs in synchronous mode transmit in frames, which are delimited by flag characters. The flag character is only transmitted as a frame delimiter; any flag characters in data are carefully transformed on transmission by the addition of bits (bit stuffing), a process which is reversed on reception. Control and data characters are then sent continuously without start and stop bits. At the end of frames, a frame check sequence is inserted, so that errors in transmission can be reliably detected. In synchronous operation, characters must be provided on time until a frame is complete; if the controlling processor does not do so, this is an "underrun error," and transmission of the frame is aborted.

  1. ^ "8251A ... - Datasheet Search Engine Download" (PDF). www.datasheetarchive.com. Retrieved 2015-12-16.
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