In computing, an edge-triggered interrupt is a class of interrupts that are triggered only on the rising edge of the assertion of the interrupt request line. These types of interrupts can typically only identify the presence of an interrupt request. When another interrupt is generated an edge triggered interrupt will not be able to distinguish it since the line is already asserted.
Multiple devices typically cannot share an edge-triggered interrupt line. Because the generation of another interrupt will go unnoticed, devices in such a configuration could go unserviced. The ISA bus in particular is known for this issue. Many ISA cards cannot be probed for interrupt status: many will stop responding or lockup the system if serviced when they did not generate an interrupt. Therefore, special care must be taken to insure such systems do not share interrupt lines.
Compare level triggered interrupt.
 | This computing article is a stub. You can help Wikipedia by expanding it. |