System bus model

The System bus model is a streamlined version of the Von Neumann model of computer architecture. The System bus models divides the computer into three individual subunits which are the CPU, memory and Input/Output. THe system bus model deviates from the von Neumann model by combining the Arithmetic logic unit(ALU) and the Central processing unit(CPU) into a single unit. ^[1]

Communications

A key feature of the System bus model are the shared communication pathways all part of the system bus.^[1] The system bus is composed of the data bus, address bus, control bus, power bus and sometimes an I/O bus.^[1] The data bus is used for transfer of data between subunits while the address bus is used to transmit ___location information between units such as where the data is going or coming from.^[1] The control bus is used to provide information as to how data is being sent.^[1] The power bus is often not graphically depicted on models but is understood to exist. Furthermore, some more complex architecturs may also incorporate a separate I/O bus for transfer of data between Input/Output devices.^[1]

References

1. Murdocca, Miles J. (2000). Principles of Computer Architecture. Prentice-Hall. ISBN 0-201-43664-7. {{cite book}}: Unknown parameter |coauthors= ignored (|author= suggested) (help)