Property Specification Language is a language developed by Accellera for specifying properties or assertions about hardware designs. Since September 2004 the standardization on the language has been done in IEEE 1850 working group. The properties can then be simulated or formally verified.
Propery Specification Language aims to be used with multiple electronic system design languages such as
- VHDL (IEEE 1076),
- Verilog (IEEE 1364),
- System Verilog (IEEE 1800), and
- SystemC by OSCI.
See also
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