System bus model

The system bus model is a streamlined version of the von Neumann model of computer architecture.^[1] The system bus models divides the computer into three individual subunits which are the CPU, memory and input/output. The system bus model deviates from the von Neumann model by combining the arithmetic logic unit (ALU) and the central processing unit (CPU) into a single unit.^[2]

File:Systembusmodel.png

Communications

A key feature of the system bus model is that the shared communication pathways are all part of the system bus.^[2]

The system bus is composed of the data bus, address bus, control bus, power bus and sometimes an I/O bus.^[2]

The data bus is used for transfer of data between subunits while the address bus is used to transmit ___location information between units such as where the data is going or coming from.^[2]

The control bus is used to provide information as to how data is being sent.^[2]

The power bus is often not graphically depicted on models but is understood to exist. Furthermore, some more complex architectures may also incorporate a separate I/O bus for transfer of data between input/output devices.^[2]

References

^ Linda Null; Julia Lobur (2006). The essentials of computer organization and architecture (2 ed.). Jones & Bartlett Learning. ISBN 9780763737696.
^ ^a ^b ^c ^d ^e ^f Murdocca, Miles J. (2000). Principles of Computer Architecture. Prentice-Hall. p. 5. ISBN 0-201-43664-7. {{cite book}}: Unknown parameter |coauthors= ignored (|author= suggested) (help)

[1] Linda Null; Julia Lobur (2006). The essentials of computer organization and architecture (2 ed.). Jones & Bartlett Learning. ISBN 9780763737696.

[POCA-2] ^ ^a ^b ^c ^d ^e ^f Murdocca, Miles J. (2000). Principles of Computer Architecture. Prentice-Hall. p. 5. ISBN 0-201-43664-7. {{cite book}}: Unknown parameter |coauthors= ignored (|author= suggested) (help)

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