Instruction Set Architecture

This is an old revision of this page, as edited by 168.209.98.35 (talk) at 18:08, 27 July 2004. The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

In Computer architecture, an Instruction Set Architecture defines how instructions are interpreted by a processor. Instructions have traditionally been encoded in binary words consisting of 32 bits, although recent trends increasingly suggest that they will be encoded in 64 bits. The Instruction Set Architecture tends to form the interface between computer hardware and software. There are two broad classifications of Instruction Set Architecture, Reduced Instruction Set Computing (RISC), and Complex Instruction Set Computing (CISC).

RISC instruction sets are also known as load-store architectures, and represent the minimal set of instructions on which a stack of software can be built. They load and store words in memory locations, perform the arithmetical operations of addition, subtraction, multiplication and division on floating point numbers as well as integers. They perform the logical operations of AND, NOT, OR and others on data, and have the ability to make decisions based on the results of logical or arithmetical calculations. These decisions usually result in some form of branching.