Property Specification Language (PSL) is a language developed by Accellera for specifying properties or assertions about hardware designs. The properties can then be simulated or formally verified. Since September 2004 the standardization on the language has been done in IEEE 1850 working group. In September 2005, the IEEE 1850 Standard for Property Specification Language (PSL) was announced.
Property Specification Language aims to be used with multiple electronic system design languages such as:
- VHDL (IEEE 1076),
- Verilog (IEEE 1364),
- SystemVerilog (IEEE 1800), and
- SystemC (IEEE 1666) by Open SystemC Initiative (OSCI).
References
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External links
- IEEE 1850 working group
- IEEE Announcement September 2005
- Accellera
- Property Specification Language Tutorial
- Designers guide to PSL
Books on PSL
- Using PSL/Sugar for Formal and Dynamic Verification 2nd Edition, Ben Cohen, Ajeetha Kumari, Srinivasan Venkataramanan
- A Practical Introduction to PSL, Cindy Eisner, Dana Fisman
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