A Universal Synchronous/Asynchronous Receiver/Transmitter (USART) is a type of a serial interface device that can be programmed to communicate asynchronously or synchronously. See Universal asynchronous receiver/transmitter (UART) for a discussion of the asynchronous capabilities of these devices.
Purpose and History
The USART's synchronous capabilities were primarily intended to support synchronous protocols like IBM's Synchronous transmit-receive (STR), Binary Synchronous Communications (BSC), Synchronous Data Link Control (SDLC) and the ISO-standard High-Level Data Link Control (HDLC) synchronous link-layer protocols, which were used with synchronous voice-frequency modems. These protocols were designed to make the best use of bandwidth when modems were analog devices. In those times, the fastest asynchronous voice-band modem could achieve at most speeds of 300 bps, while synchronous modems could run at speeds up to 9600 bps. Synchronous transmission used only slightly over 80% of the bandwidth of the now more-familiar asynchronous transmission, since start and stop bits were unnecessary. Those modems are obsolete, having been replaced by modems with which convert asynchronous data to synchronous forms, but similar synchronous telecommunications protocols survive in numerous block-oriented technologies such as the widely-used IEEE 802.2 (Ethernet) link-level protocol. USARTs are often integrated with MCUs.
This section needs expansion with: current protocols using HDLC or SDLC framing, if any exist, or a statement that none do.. You can help by adding to it. |
Operation
The operation of a USART is intimately related to the various protocols; refer to those pages for details. This section covers only some general characteristics.
- USARTs in synchronous mode transmits data in frames. In synchronous operation, characters must be provided on time until a frame is complete; if the controlling processor does not do so, this is an "underrun error," and transmission of the frame is aborted.
- USARTs operating as synchronous devices used either character-oriented or bit-oriented mode. In character (STR and BSC) modes, the device relied on particular characters to define frame boundaries; in bit (HDLC and SDLC) modes earlier devices either relied on physical-layer signals, while later devices took over the physical-layer recognition of bit patterns.
- A synchronous line is never silent; when the modem is transmitting, data is flowing. In character-oriented mode, a USART will send a steady series of synchronization characters; in bit-oriented mode this padding is provided by the physical layer.
Devices
| Manufacturer | Device | Description | Device Data |
|---|---|---|---|
| Intel | 8251A | Programmable Communications Interface | Intel 8251A Data Sheet[1]. |
| Zilog | Z85230/Z80230/Z8523L/Z85233 | Enhanced Serial Communications Controller | IXYS web page[2] |
References
- ^ "Intel 8251A Programmable Communications Interface" (PDF). www.datasheetarchive.com. Retrieved 2015-12-16.
- ^ "Enhanced Serial Communications Controllers:". www.zilog.com. Retrieved 2015-12-16.