Property Specification Language is a language standardized by Accellera for specifying properties or assertions about hardware designs. It comes in two flavors, one for VHDL and one for Verilog.
More information is available at
Property Specification Language is a language standardized by Accellera for specifying properties or assertions about hardware designs. It comes in two flavors, one for VHDL and one for Verilog.
More information is available at