Parallel external memory

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Parallel external memory (Model)

In computer science, a parallel external memory (PEM) model is a cache-aware, external-memory abstract machine.[1] It is the parallel-computing analogy to the single-processor external memory (EM) model. In a similar way, it is the cache-aware analogy to the parallel random-access machine (PRAM). The PEM model consists of a number of processors, together with their respective private caches and a shared main memory.

Model

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Read / Write conflicts

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Complexity measure

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Examples

Prefixsum

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Multiway partitioning

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Selection

The selection problem is to find an item in an unordered list   of size  which is bigger than   other elements in  .

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Under the assumption that the input is stored in contiguous memory, PEMSELECT has an I/O complexity of:

 

Distribution sort

Distribution sort partitions an input list  of size  into  disjoint buckets of similar size. Every bucket is then sorted recursively and the results are combined into a fully sorted list.

If  the task is delegated to a cache-optimal single-processor sorting algorithm.

Otherwise the following algorithm is used:

// Sample  elements from  
for each processor  in parallel do
  if  then
     
    Load  in  -sized pages and sort pages individually
  else
     
    Load and sort  as single page
  end if
  Pick every  'th element from each sorted memory page into contiguous vector  of samples
end for 

in parallel do
  Combine vectors  into a single contiguous vector  
  Make  copies of  :  
end do

// Find  pivots  
for  to  in parallel do
   
end for

Pack pivots in contiguous array  

// Partition  around pivots into buckets  
 

// Recursively sort buckets
for  to  in parallel do
  recursively call  on bucket  of size  
  using  processors responsible for elements in bucket  
end for


Template:collapse is not available for use in articles (see MOS:COLLAPSE).

Other algorithms

Algorithm Description I/O complexity Space complexity
PEM Mergesort[1] Sorts a list of items    

See also

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References

  1. ^ a b Arge, Lars; Goodrich, Michael T.; Nelson, Michael; Sitchinava, Nodari (2008). "Fundamental parallel algorithms for private-cache chip multiprocessors". Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures - SPAA '08. New York, New York, USA: ACM Press. doi:10.1145/1378533.1378573. ISBN 9781595939739.