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File:Full-adder logic diagram.svg

Original file (SVG file, nominally 400 × 180 pixels, file size: 32 KB)

Summary

Description
English: Circuit Diagram of a Full Adder.
Date
Source Own work
Author Inductiveload

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Public ___domain I, the copyright holder of this work, release this work into the public ___domain. This applies worldwide.
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inception

5 August 2006

data size

32,662 byte

media type

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checksum

1c542d2063e381ab2a911be3a12ab98f2d6ceb49

determination method or standard: SHA-1

File history

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Date/TimeThumbnailDimensionsUserComment
current12:30, 23 March 2014Thumbnail for version as of 12:30, 23 March 2014400 × 180 (32 KB)Tibor89Reverted to version as of 12:26, 23 March 2014
12:29, 23 March 2014Thumbnail for version as of 12:29, 23 March 2014400 × 180 (32 KB)Tibor89Added carry-block frame and marked critical path of it.
12:26, 23 March 2014Thumbnail for version as of 12:26, 23 March 2014400 × 180 (32 KB)Tibor89Added carry-block frame and marked critical path of it.
23:47, 16 January 2009Thumbnail for version as of 23:47, 16 January 2009400 × 180 (28 KB)Inductiveload{{Information |Description= |Source= |Date= |Author= |Permission= |other_versions= }}
20:27, 5 August 2006Thumbnail for version as of 20:27, 5 August 2006225 × 100 (16 KB)Inductiveload{{Information |Description=Circuit Diagram of a Full Adder |Source=Own drawing, Inkscape 0.43 |Date=05/08/06 |Author=inductiveload |Permission=PD |other_versions= }} Category:Adders

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