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Guy Harris (talk | contribs) →First sentence is wrong: Microcoded machines are often not just "SIMH in control store"-type machines; they may even have significant assistance from specialized hardware. S/360's instruction set didn't look like bytecode; it wasn't even byte-aligned, it was halfword-aligned. |
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:::{{tq| Bytecode should apply to any byte oriented instruction encoding, back to (as far as I know) IBM System/360.}} S/360 is a byte-addressable processor, but its ''instruction set'' isn't byte-aligned, it's halfword-aligned.
:::{{tq|An important idea behind S/360 was the low-end microcoded machines. That is, ones that interpret the instructions in software.}} Microcoding goes anywhere from "it's kinda like [[SIMH]]" vertical microcode, where it looks like a software interpreter, to "it's a state machine defined by words in a control memory with bitfields that either go directly to CPU circuit or control which next control memory word is fetched" horizontal microcode, with various types in between. Often instruction fetch and decode is helped by specialized hardware controlled by the microcode, or is done by a separate hardwired or microcoded engine, with the results fed to a separate execution unit. [[User:Guy Harris|Guy Harris]] ([[User talk:Guy Harris|talk]]) 23:30, 14 August 2025 (UTC)
:{{tq|An instruction set is what processors have.}} OK, is [https://bitsavers.org/pdf/ibm/system38/GA21-9331-1_System_38_Functional_Reference_Manual_Feb81.pdf the never-directly-executed instructions generated by all compilers for System/38 ''not'' used for internal development at IBM, and one of the compilers used for internal development at IBM], or is [https://bitsavers.org/pdf/ibm/system38/SC21-9037-3_IBM_System_38_Internal_Microprogramming_Instructions_Formats_and_Functions_Reference_4th_ed_198508.pdf the executed-by-the-microcoded-processor instructions generated by another compiler used for internal development at IBM, possibly an assembler used for internal development at IBM, and the low-level system code that translates the first instruction set into this instruction set in order to run that code], the instruction set for [[IBM System/38]]? The [[AS/400]] originally continued with those instruction sets, but switched to an extended form of [[PowerPC]]/[[Power ISA]] for the second instruction set ''while continuing to run the same software without recompilation'' (unless you screwed up and "removed observability", meaning "discarding the first-instruction-set code and leaving behind only the second-instruction-set code generated by the binary-to-binary translator").
:{{tq|Bytecode need not be portable.}} If, for a given bytecode, you can write bytecode interpreters that run on more than one type of CPU (whether by having different interpreters for different machines, or by writing a portable interpreter), it's at least in principle portable, and if you actually ''do'' that, it ''is'' portable. (The OS portability issue is probably a bigger issue than the CPU portability issue.)
:{{tq|I've heard that there is a CPU for Java bytecode so in that context the bytecode is an instruction set.}} [[picoJava]] did that.
:Some other machines that could perhaps be considered bytecode machines are the [[Pascal MicroEngine]] (using the same [[MCP-1600]] that the [[LSI-11]] used), possibly the [[Lilith (computer)|Lilith]] running "M-code" for [[Modula-2]], and the Xerox D-machines, microcoded to interpret, among other things, the stack-machine code generated by the [[Mesa (programming language)|Mesa]] compiler. [[User:Guy Harris|Guy Harris]] ([[User talk:Guy Harris|talk]]) 23:54, 14 August 2025 (UTC)
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