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Changing short description from "Use of computer hardware to assist software, or sometimes replace software, in the process of data encryption" to "Use of computer hardware to assist software in the process of data encryption" (Shortdesc helper) |
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'''Hardware-based encryption''' is the use of [[computer hardware]] to assist software, or sometimes replace software, in the process of data [[encryption]]. Typically, this is implemented as part of the [[CPU|processor]]'s [[Instruction set architecture|instruction set]]. For example, the [[Advanced Encryption Standard|AES]] encryption algorithm (a modern [[cipher]]) can be implemented using the [[AES instruction set]] on the ubiquitous [[x86 architecture]].<ref name="Intel AES Instructions" /> Such instructions also exist on the [[ARM architecture]].<ref name="cortex cryptography" /> However, more unusual systems exist where the cryptography module is separate from the central processor, instead being implemented as a [[coprocessor]], in particular a [[secure cryptoprocessor]] or [[cryptographic accelerator]], of which an example is the [[IBM 4758]], or its successor, the [[IBM 4764]].<ref name="IBM 4764" /> Hardware implementations can be faster and less prone to exploitation than traditional software implementations, and furthermore can be protected against tampering.<ref name="performance" />
== History ==
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<ref name="Oxford">{{cite web|url=https://www.cs.ox.ac.uk/teaching/materials17-18/ca/lecture03.pdf|title=x86-64 Instruction Set|publisher=[[University of Oxford]]|pages=1|date=18 April 2017|access-date=24 January 2018}}</ref>
<ref name="NIST National Security">{{cite web |url=http://csrc.nist.gov/groups/ST/toolkit/documents/aes/CNSS15FS.pdf |title=National Policy on the Use of the Advanced Encryption Standard (AES) to Protect National Security Systems and National Security Information |author=Lynn Hathaway |date=June 2003 |access-date=15 February 2011 |url-status=live |archive-url=https://web.archive.org/web/20101106122007/http://csrc.nist.gov/groups/ST/toolkit/documents/aes/CNSS15FS.pdf |archive-date=2010-11-06 }}</ref>
<ref name="IBM 4758 datasheet">{{cite web|url=ftp://www6.software.ibm.com/software/cryptocards/G221-9091-04.pdf|title=IBM 4758 Models 2 and 23 PCI Cryptographic Coprocessor|date=May 2004|access-date=24 January 2018|archive-url=https://web.archive.org/web/20170705054058/ftp://www6.software.ibm.com/software/cryptocards/G221-9091-04.pdf|archive-date=2017-07-05|url-status=dead|publisher=[[IBM]]}}</ref>
<ref name="openwrt">{{cite web|url=http://wiki.openwrt.org/doc/hardware/cryptographic.hardware.accelerators|title=Cryptographic Hardware Accelerators|publisher=OpenWRT.org|date=17 May 2016|access-date=25 January 2018|url-status=live|archive-url=https://web.archive.org/web/20180121000023/http://wiki.openwrt.org/doc/hardware/cryptographic.hardware.accelerators|archive-date=2018-01-21}}</ref>
<ref name="NIST approval">{{cite web|url=https://csrc.nist.gov/csrc/media/projects/cryptographic-module-validation-program/documents/security-policies/140sp1505.pdf|date=10 December 2012|access-date=20 January 2018|title=IBM 4765 Cryptographic Coprocessor Security Module|publisher=[[National Institute of Standards and Technology]]|url-status=live|archive-url=https://web.archive.org/web/20180125015153/https://csrc.nist.gov/csrc/media/projects/cryptographic-module-validation-program/documents/security-policies/140sp1505.pdf|archive-date=2018-01-25}}</ref>
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