Predication (computer architecture): Difference between revisions

Revision as of 21:05, 7 June 2021

Revision as of 21:18, 9 June 2021

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Put simply: if the Register Condition bit is set, the instruction is executed; if the bit is clear, it is not. With Condition Register's contents being dynamic, predicated instruction execution is likewise dynamic, i.e. (conditionally) determined at runtime.

[[Vector processors]], some [[SIMD]] ISAs (such as [[AVX2]] and [[AVX-512]]]) and [[GPU]]s in general make heavy use of predication, applying one bit of a conditional ''mask Vector'' to the corresponding elements in the Vector registers being processed, wherewhereas scalar predication in scalar instruction sets only need the one predicate bit.

==Overview==