Content deleted Content added
missed word "has" Tags: Mobile edit Mobile web edit Advanced mobile edit |
→Differences from other models: clarify PEM Tags: Mobile edit Mobile web edit Advanced mobile edit |
||
Line 19:
The key difference between SIMT and [[SIMD lanes]] is that each of the Processing Units in the SIMT Array have their own local memory, and may have a completely different Stack Pointer (and thus perform computations on completely different data sets), whereas the ALUs in SIMD lanes know nothing about memory per se, and have no [[register file]].
This is illustrated by the [[ILLIAC IV]]. Each SIMT core was termed a Processing Element, and each PE had its own separate Memory (PEM). Each PE had an "Index register" which was an address into its PEM.<ref>https://www.researchgate.net/publication/2992993_The_Illiac_IV_system {{Bare URL inline|date=July 2025}}</ref><ref>{{Cite web | title=Archived copy | url=https://apps.dtic.mil/sti/tr/pdf/ADA954882.pdf | archive-url=https://web.archive.org/web/20240427173522/https://apps.dtic.mil/sti/tr/pdf/ADA954882.pdf | archive-date=2024-04-27}}</ref>
In the [[ILLIAC IV]] the Burroughs B6500 primarily handled I/O, but also sent instructions to the Control Unit (CU) which would then handle the broadcasting to the PEs. Additionally the B6500, in its role as an I/O processor, had access to ''all'' PEMs.
| |||