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In something of a Wikipedia [[Fourth wall]] breakage note: [[GPUs]] and other highly-specialist tasks such as cryptography tend to result in extreme-specialist instructions, wthout which performance would suck. Examples include [[AES instruction set]] extensions that cannot in any way be used for any other purpose. GPUs such as Larrabee<ref>{{cite web | title=TomF's talks and papers | url=https://tomforsyth1000.github.io/papers/papers.html }}</ref> and [[Single instruction, multiple threads#Nyuzi GPGPU|Nyuzi]] attempted to "dial back" this practice to some extent, only to discover why it is done (performance sucks otherwise... seeing a trend, here?).
This page is ''not'' about such specialised instructions, nor even of their functionality. It covers useful ''Categorisation'' of the ''existence'' in CPUs and CPU families, of ''general-purpose'' bit-manipulation instructions that ''happen'' to greatly improve performance or power consumption of specific algorithms. An example is cryptography making heavy use of [[Bitwise operation#Rotate|rotate]], but rotate having many other practical uses elsewhere: just not as many as, say, Add, which results in rotate being optional where Add does not. Such ISA design trade-offs are notoriously meticulous but ultimately pragmatic.
If you encounter any type of ''unusual or important'' bit manipulation instructions, or any CPU that has them, feel free to add them below, bearing in mind that the page's primary purpose is Categorisation, not explicit functional description per se. A helpful task for future readers would be to add such pages describing the functionality to the "See also" section. Enjoy the end of the Fourth Wall...
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